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Release Notes for **GHRD for Agilex 3 FPGA C-Series 25.1.1** (#1)
Release Information: Quartus Version: 25.1.1 Build 125 07/31/2025 SC Pro Edition Tag: QPDS25.1.1_REL_GSRD_PR Build: socfpga_ghrd_lth_base/25.1.1/286 New Features and Enhancements - Initial release for Agilex 3 FPGA C-Series design. Issues Resolved None Latest Known Issues None
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‎.gitignore‎

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/venv/
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/install/

‎LICENSE‎

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Copyright 2024-2025 Altera Corporation
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Permission is hereby granted, free of charge, to any person obtaining a copy of
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this software and associated documentation files (the “Software”), to deal in
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the Software without restriction, except as set forth below, including without
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limitation the rights to use, copy, modify, merge, publish, distribute,
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sublicense, and/or sell copies of the Software, and to permit persons to whom
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the Software is furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in all
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copies or substantial portions of the Software;
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If a file contained in this Software includes separate license text or a header
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file with license terms, those terms will supersede this agreement for purposes
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of that file only, all files without a separate agreement are subject to this
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agreement;
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The Software must be used solely for design and implementation on an Altera
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product;
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You must not use the Software or devices you configure using this Software to
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violate any internationally recognized human right; and
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The Software may be subject to export controls under applicable government laws
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and regulations, including those of the U.S. You must: a) comply with
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applicable laws and regulations and obtain any necessary authorizations; b) not
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export, import, or transfer the materials to any prohibited or sanctioned
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country, person, or entity; or c) use the materials for the development,
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design, manufacture, or production of nuclear, missile, chemical, or biological
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weapons.
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THE SOFTWARE IS PROVIDED “AS IS”, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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SOFTWARE.
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Governing Law and Jurisdiction. If you are in the Americas, U.S. and Delaware
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law governs all disputes arising out of or relating to this agreement without
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regard to conflict-of-laws principles. The state and federal courts in
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Wilmington, Delaware will have exclusive jurisdiction over any dispute arising
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out of or relating to this agreement. If you are in Europe or Africa, the laws
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of England and Wales govern all matters arising out of or relating to this
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agreement without regard to conflict-of-laws principles. The courts in England
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will have exclusive jurisdiction over any dispute arising out of or relating to
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this agreement. If you are in Asia or Australia, Singapore law governs all
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disputes arising out of or relating to this agreement without regard to
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conflict-of-laws principles. The courts in Singapore will have exclusive
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jurisdiction over any dispute arising out of or relating to this agreement. You
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and Intel consent to personal jurisdiction and venue in the courts designated
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for your location. If you are in China, Hong Kong law governs all disputes
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arising out of or relating to this agreement without regard to conflict-of-laws
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principles. Any dispute arising out of or relating to this agreement will be
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subject to arbitration by the Hong Kong International Arbitration Centre, this
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arbitration agreement will be governed by Hong Kong law, and the seat and
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location of proceedings will be Hong Kong. The current rules of the HKIAC will
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apply, except that the arbitration will be referred to a sole arbitrator and
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the proceedings will be conducted in English. The Arbitral Tribunal may only
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award monetary damages and may not award injunctive relief or any remedy that
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requires a party to license any intellectual property rights. Regardless of the
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above or your location, claims for misappropriation of trade secrets and breach
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of confidentiality obligations may also be brought in any court that has
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jurisdiction over the parties if the relief sought is limited to injunctive or
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other nonmonetary relief. The parties exclude the application of the United
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Nations Convention on Contracts for the International Sale of Goods (1980).

‎Makefile‎

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THIS_MK_ABSPATH := $(abspath $(lastword $(MAKEFILE_LIST)))
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THIS_MK_DIR := $(dir $(THIS_MK_ABSPATH))
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# Enable pipefail for all commands
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SHELL=/bin/bash -o pipefail
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# Enable second expansion
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.SECONDEXPANSION:
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# Clear all built in suffixes
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.SUFFIXES:
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NOOP :=
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SPACE := $(NOOP) $(NOOP)
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COMMA := ,
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HOSTNAME := $(shell hostname)
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##############################################################################
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# Environment check
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##############################################################################
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##############################################################################
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# Configuration
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##############################################################################
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WORK_ROOT := $(abspath $(THIS_MK_DIR)/work)
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INSTALL_RELATIVE_ROOT ?= install
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INSTALL_ROOT ?= $(abspath $(THIS_MK_DIR)/$(INSTALL_RELATIVE_ROOT))
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PYTHON3 ?= python3
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VENV_DIR := venv
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VENV_PY := $(VENV_DIR)/bin/python
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VENV_PIP := $(VENV_DIR)/bin/pip
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ifneq ($(https_proxy),)
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PIP_PROXY := --proxy $(https_proxy)
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else
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PIP_PROXY :=
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endif
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VENV_PIP_INSTALL := $(VENV_PIP) install $(PIP_PROXY) --timeout 90 --trusted-host pypi.org --trusted-host files.pythonhosted.org
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##############################################################################
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# Set default goal before any targets. The default goal here is "test"
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##############################################################################
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DEFAULT_TARGET := all
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.DEFAULT_GOAL := default
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.PHONY: default
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default: $(DEFAULT_TARGET)
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##############################################################################
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# Makefile starts here
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##############################################################################
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###############################################################################
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# Design Targets
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###############################################################################
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# Initialize variables
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ALL_TARGET_STEM_NAMES =
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ALL_PRE_PREP_TARGETS =
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ALL_PREP_TARGETS =
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ALL_IP_UPGRADE_TARGETS =
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ALL_GENERATE_DESIGN_TARGETS =
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ALL_PACKAGE_DESIGN_TARGETS =
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ALL_BUILD_TARGETS =
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ALL_SW_BUILD_TARGETS =
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ALL_TEST_TARGETS =
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ALL_INSTALL_SOF_TARGETS =
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ALL_TARGET_ALL_NAMES =
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# Define function to create targets
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define create_targets_on_subdir
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ALL_TARGET_STEM_NAMES += $(addprefix $(strip $(1))-,$(strip $(2)))
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ALL_PRE_PREP_TARGETS += $(addsuffix -pre-prep,$(addprefix $(strip $(1))-,$(strip $(2))))
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ALL_PREP_TARGETS += $(addsuffix -prep,$(addprefix $(strip $(1))-,$(strip $(2))))
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ALL_IP_UPGRADE_TARGETS += $(addsuffix -ip-upgrade,$(addprefix $(strip $(1))-,$(strip $(2))))
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ALL_GENERATE_DESIGN_TARGETS += $(addsuffix -generate-design,$(addprefix $(strip $(1))-,$(strip $(2))))
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ALL_PACKAGE_DESIGN_TARGETS += $(addsuffix -package-design,$(addprefix $(strip $(1))-,$(strip $(2))))
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ALL_BUILD_TARGETS += $(addsuffix -build,$(addprefix $(strip $(1))-,$(strip $(2))))
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ALL_SW_BUILD_TARGETS += $(addsuffix -sw-build,$(addprefix $(strip $(1))-,$(strip $(2))))
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ALL_TEST_TARGETS += $(addsuffix -test,$(addprefix $(strip $(1))-,$(strip $(2))))
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ALL_INSTALL_SOF_TARGETS += $(addsuffix -install-sof,$(addprefix $(strip $(1))-,$(strip $(2))))
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ALL_TARGET_ALL_NAMES += $(addsuffix -all,$(addprefix $(strip $(1))-,$(strip $(2))))
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$(strip $(1))-%-pre-prep : venv
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$(MAKE) --no-print-directory -C $(strip $(1)) $$*-pre-prep
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$(strip $(1))-%-prep : venv
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$(MAKE) --no-print-directory -C $(strip $(1)) $$*-prep
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$(strip $(1))-%-ip-upgrade : venv
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$(MAKE) --no-print-directory -C $(strip $(1)) $$*-ip-upgrade
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$(strip $(1))-%-generate-design : venv
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$(MAKE) --no-print-directory -C $(strip $(1)) $$*-generate-design
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$(strip $(1))-%-package-design :
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$(MAKE) --no-print-directory -C $(strip $(1)) $$*-package-design INSTALL_ROOT=$(INSTALL_ROOT)/$(strip $(3))
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$(strip $(1))-%-build :
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$(MAKE) --no-print-directory -C $(strip $(1)) $$*-build
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$(strip $(1))-%-sw-build :
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$(MAKE) --no-print-directory -C $(strip $(1)) $$*-sw-build
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$(strip $(1))-%-test :
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$(MAKE) --no-print-directory -C $(strip $(1)) $$*-test
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$(strip $(1))-%-install-sof :
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$(MAKE) --no-print-directory -C $(strip $(1)) $$*-install-sof INSTALL_ROOT=$(INSTALL_ROOT)/$(strip $(3))
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.PHONY: $(addsuffix -all,$(addprefix $(strip $(1))-,$(strip $(2))))
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$(addsuffix -all,$(addprefix $(strip $(1))-,$(strip $(2)))): venv
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$(MAKE) $(addsuffix -pre-prep,$(addprefix $(strip $(1))-,$(strip $(2))))
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$(MAKE) $(addsuffix -generate-design,$(addprefix $(strip $(1))-,$(strip $(2))))
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$(MAKE) $(addsuffix -package-design,$(addprefix $(strip $(1))-,$(strip $(2))))
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$(MAKE) $(addsuffix -prep,$(addprefix $(strip $(1))-,$(strip $(2))))
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$(MAKE) $(addsuffix -build,$(addprefix $(strip $(1))-,$(strip $(2))))
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$(MAKE) $(addsuffix -sw-build,$(addprefix $(strip $(1))-,$(strip $(2))))
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$(MAKE) $(addsuffix -test,$(addprefix $(strip $(1))-,$(strip $(2))))
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$(MAKE) $(addsuffix -install-sof,$(addprefix $(strip $(1))-,$(strip $(2))))
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endef
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# Create rules for subdirs
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TARGET_SUBDIR := \
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a3cw135-devkit-oobe
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# Create the subdir recipes by recurinsively calling the create_targets_on_subdir on each TARGET_SUBDIR
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define create_subdir_targets
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$(foreach target, $(shell make --no-print-directory -q -C $(1) print-targets), $(eval $(call create_targets_on_subdir, $(1), $(target), designs)))
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endef
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$(foreach subdir,$(TARGET_SUBDIR),$(eval $(call create_subdir_targets,$(subdir))))
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###############################################################################
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# UTILITY TARGETS
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###############################################################################
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# Deep clean using git
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.PHONY: dev-clean
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dev-clean :
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rm -rf $(INSTALL_ROOT) $(WORK_ROOT)
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git clean -dfx --exclude=/.vscode --exclude=.lfsconfig
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# Using git
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.PHONY: dev-update
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dev-update :
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git pull
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git submodule update --init --recursive
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.PHONY: clean
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clean:
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rm -rf $(INSTALL_ROOT) $(WORK_ROOT)
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git clean -dfx --exclude=/.vscode --exclude=.lfsconfig --exclude=$(VENV_DIR)
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# Prep workspace
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venv:
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$(PYTHON3) -m venv $(VENV_DIR)
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$(VENV_PIP_INSTALL) --upgrade pip
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$(VENV_PIP_INSTALL) -r requirements.txt
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.PHONY: venv-freeze
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venv-freeze:
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$(VENV_PIP) freeze > requirements.txt
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sed -i -e 's/==/~=/g' requirements.txt
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.PHONY: prepare-tools
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prepare-tools : venv
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# Include not_shipped Makefile if present
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-include not_shipped/Makefile.mk
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###############################################################################
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# Toplevel Targets
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###############################################################################
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.PHONY: pre-prep
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pre-prep: $(ALL_PRE_PREP_TARGETS)
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.PHONY: prep
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prep: $(ALL_PREP_TARGETS)
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.PHONY: ip-upgrade
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ip-upgrade: $(ALL_IP_UPGRADE_TARGETS)
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.PHONY: generate-designs
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generate-designs: $(ALL_GENERATE_DESIGN_TARGETS)
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.PHONY: package-designs
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package-designs: $(ALL_PACKAGE_DESIGN_TARGETS)
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# Build options
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.PHONY: build
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build: $(ALL_BUILD_TARGETS)
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# SW-Build options
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.PHONY: sw-build
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sw-build: $(ALL_SW_BUILD_TARGETS)
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# Run all tests
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.PHONY: test
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test : build
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.PHONY: install-sof
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install-sof: $(ALL_INSTALL_SOF_TARGETS)
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.PHONY: all
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all: $(ALL_TARGET_ALL_NAMES)
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###############################################################################
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# HELP
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###############################################################################
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.PHONY: help
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help:
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$(info GHRD Build)
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$(info ----------------)
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$(info All Targets : $(ALL_TARGET_ALL_NAMES))
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$(info Stem names : $(ALL_TARGET_STEM_NAMES))
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$(info Pre-Prep Targets : $(ALL_PRE_PREP_TARGETS))
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$(info Prep Targets : $(ALL_PREP_TARGETS))
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$(info Build Targets : $(ALL_BUILD_TARGETS))
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$(info Test Targets : $(ALL_TEST_TARGETS))
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$(info Package Targets : $(ALL_PACKAGE_DESIGN_TARGETS))
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‎README.md‎

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# agilex3c-ed-gsrd
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Altera Agilex 3 C-series GSRD
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# Agilex 3 C-Series Golden Hardware Reference Design (GHRD)
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This repository contains Golden Hardware Reference Design (GHRD) for Agilex 3 C-Series System On Chip (SoC) FPGA.
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The GHRD is part of the Golden System Reference Design (GSRD), which provides a complete solution, including exercising soft IP in the fabric, booting to U-Boot, then Linux, and running sample Linux applications.
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Refer to the [Altera FPGA Developer Site](https://altera-fpga.github.io/latest/ed-demo-list/ed-list/) for information about GSRD.
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The [designs](#designs) are stored in individual folders. Each design can be opened, modified and compiled by using Quartus Prime software.
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GHRD releases are created for each version of Quartus Prime Software. It is recommended to use the release for your version of Quartus Prime.
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These reference designs demonstrate the system integration between Hard Processor System (HPS) and FPGA IPs.
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## Baseline feature
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This is applicable to all designs.
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- Hard Processor System (HPS) enablement and configuration
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- Enable dual core Arm Cortex-A55 processor
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- HPS Peripheral and I/O (SD/MMC, EMAC, MDIO, USB, I3C, JTAG, UART, and GPIO)
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- HPS Clock and Reset
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- HPS FPGA Bridge and Interrupt
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- HPS EMIF configuration (Inline ECC for LPDDR4 is enabled by default)
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- System integration with FPGA IPs
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- Peripheral subsystem that consists of System ID, Programmable I/O (PIO) IP for controlling PushButton and LEDs.
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- Debug subsystem that consists of JTAG-to-Avalon Master IP to allow System-Console debug activity and FPGA content access through JTAG
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- 256KB of FPGA On-Chip Memory
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## The GHRD use cases:
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1. use the precompiled bitstream(sof) in release assets to programm the board.
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2. open and compile the [designs](#designs) with Quartus Prime.
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3. modify and compile the [designs](#designs) with Quartus Prime.
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## Dependency
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* Altera Quartus Prime 25.1.1
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* Supported Board
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- Agilex 3 FPGA and SoC C-Series Development Kit: [Devkit User Guide](https://www.intel.com/content/www/us/en/docs/programmable/851698/current)
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![Agilex 3 FPGA and SoC C-Series Development Kit](images/agilex3_soc_devkit.png)
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## Tested Platform for the GHRD Build Flow
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* SUSE Linux Enterprise Server 15 SP4
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## Setup
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Several tools are required to be in the path.
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* Altera Quartus Prime 25.1.1
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* Python 3.11.5 (only required when using command line to build)
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### Example Setup for Altera Quartus Prime tools
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This is recommended, when using command line to build.
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```bash
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export QUARTUS_ROOTDIR=~/intelFPGA_pro/25.1.1/quartus
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```
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Note: Adapt the path above to where Quartus Prime is installed.
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```bash
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export PATH="$QUARTUS_ROOTDIR/bin:$QUARTUS_ROOTDIR/../qsys/bin:$QUARTUS_ROOTDIR/../niosv/bin:$QUARTUS_ROOTDIR/sopc_builder/bin:$QUARTUS_ROOTDIR/../questa_fe/bin:$QUARTUS_ROOTDIR/../syscon/bin:$QUARTUS_ROOTDIR/../riscfree/RiscFree:$PATH"'
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```
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## Quick start
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### Notes
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- Command line and Quartus GUI should not be used intertwined.
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- Mixing both might not generate some fileset correctly and fail the build.
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### using command line
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Copy and run the desired make command from [designs](#designs) in the root directory.
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After build, the design files (zip, sof and rbf) can be found in install/designs folder.
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### using Quartus GUI
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- Launch Quartus.
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- Open the project. Example: a3cw135-devkit-oobe/legacy-baseline/top.qpf
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- Click the play button to compile the design.
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- The compiled sof can be found in output_folders of the project path.
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## Designs
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### Agilex 3 FPGA and SoC C-Series Development Kit
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Refer to the individual readme for details of the design.
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* [a3cw135-devkit-oobe/legacy-baseline](a3cw135-devkit-oobe/legacy-baseline/README.md) :
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Legacy baseline GHRD for the Agilex 3 FPGA and SoC C-Series Development Kit.
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```bash
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make a3cw135-devkit-oobe-legacy-baseline-legacy_baseline-all
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```
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## Install location:
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After build, the design files (zip, sof and rbf) can be found in install/designs folder.
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These files are also uploaded as github release assets.
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- \<design_name>**.zip**
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- This is the archeived project files of the individual GHRD.
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- \<design_name>**.sof**
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- Compiled bitstream. Can be programm on board.
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- \<design_name>**hps_debug.sof**
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- This bitstream is injected with hps wipe program. This creates a wait loop to boot with arm debugger.
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Refer [readme](a3cw135-devkit-oobe/legacy-baseline/software/hps_debug/README.md)

‎SECURITY.md‎

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# Security Policy
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Altera is committed to the security of its products.
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## Reporting a Vulnerability
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Security vulnerabilities in this project can be reported to Altera’s security incident response team utilizing the guidelines here: https://www.altera.com/security/psirt.html.

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