Update software to QPDS24.2_REL_GSRD_PR tag

rodfrazer-intel · rodfrazer-intel · commit 9b5df386a024 · 2024-08-01T00:33:14.000-04:00
The altera-opensource repos are downloaded using the
QPDS24.2_REL_GSRD_PR tag and software patches ported to align with the
new environment.

Signed-off-by: Rod Frazer &lt;rod.frazer@intel.com&gt;
diff --git a/brd_altera_a5e065_premium_es/sw_builds/build_bootloaders.sh b/brd_altera_a5e065_premium_es/sw_builds/build_bootloaders.sh
@@ -4,7 +4,7 @@
 # SPDX-License-Identifier: MIT-0
 #
 
-TAG_NAME="QPDS24.1_REL_AGILEX5_GSRD_PR"
+TAG_NAME="QPDS24.2_REL_GSRD_PR"
 
 # change into the directory of this script
 cd $(dirname ${0})
@@ -81,7 +81,6 @@ ln -s ../arm-trusted-firmware/build/agilex5/release/bl31.bin \
 	|| { echo "ERROR" ; exit 1 ; }
 
 PATCH_FILES="
-../../../common_sw/u-boot_patches/v1-0001-HSD-15015933655-ddr-altera-agilex5-Hack-dual-port-DO-NOT-MERGE.patch \
 ../../../common_sw/u-boot_patches/include-exports.h.patch \
 ../../../common_sw/u-boot_patches/include-configs-socfpga_soc64_common.h.patch \
 ../../../common_sw/u-boot_patches/include-_exports.h.patch \
diff --git a/brd_altera_a5e065_premium_es/sw_builds/build_linux_kernel.sh b/brd_altera_a5e065_premium_es/sw_builds/build_linux_kernel.sh
@@ -4,7 +4,7 @@
 # SPDX-License-Identifier: MIT-0
 #
 
-TAG_NAME="QPDS24.1_REL_AGILEX5_GSRD_PR"
+TAG_NAME="QPDS24.2_REL_GSRD_PR"
 
 # change into the directory of this script
 cd $(dirname ${0})
@@ -67,7 +67,6 @@ make tinyconfig \
 
 # apply patches to the kernel sources
 PATCH_FILES="
-../../../common_sw/linux_patches/0001-Refactored-buffer-allocation-and-buffer-free-to-be-p.patch \
 ../../../common_sw/linux_patches/brd_altera_a5e065_premium_es-arch-arm64-boot-dts-intel-socfpga_agilex5_socdk.dts.patch
 "
 for NEXT_PATCH in ${PATCH_FILES:?}
diff --git a/brd_arrow_axe5_eagle_es/sw_builds/build_bootloaders.sh b/brd_arrow_axe5_eagle_es/sw_builds/build_bootloaders.sh
@@ -4,7 +4,7 @@
 # SPDX-License-Identifier: MIT-0
 #
 
-TAG_NAME="QPDS24.1_REL_AGILEX5_GSRD_PR"
+TAG_NAME="QPDS24.2_REL_GSRD_PR"
 
 # change into the directory of this script
 cd $(dirname ${0})
@@ -81,7 +81,6 @@ ln -s ../arm-trusted-firmware/build/agilex5/release/bl31.bin \
 	|| { echo "ERROR" ; exit 1 ; }
 
 PATCH_FILES="
-../../../common_sw/u-boot_patches/v1-0001-HSD-15015933655-ddr-altera-agilex5-Hack-dual-port-DO-NOT-MERGE.patch \
 ../../../common_sw/u-boot_patches/include-exports.h.patch \
 ../../../common_sw/u-boot_patches/include-configs-socfpga_soc64_common.h.patch \
 ../../../common_sw/u-boot_patches/include-_exports.h.patch \
diff --git a/brd_arrow_axe5_eagle_es/sw_builds/build_linux_kernel.sh b/brd_arrow_axe5_eagle_es/sw_builds/build_linux_kernel.sh
@@ -4,7 +4,7 @@
 # SPDX-License-Identifier: MIT-0
 #
 
-TAG_NAME="QPDS24.1_REL_AGILEX5_GSRD_PR"
+TAG_NAME="QPDS24.2_REL_GSRD_PR"
 
 # change into the directory of this script
 cd $(dirname ${0})
@@ -67,7 +67,6 @@ make tinyconfig \
 
 # apply patches to the kernel sources
 PATCH_FILES="
-../../../common_sw/linux_patches/0001-Refactored-buffer-allocation-and-buffer-free-to-be-p.patch \
 ../../../common_sw/linux_patches/brd_arrow_axe5_eagle_es-arch-arm64-boot-dts-intel-socfpga_agilex5_socdk.dts.patch
 "
 for NEXT_PATCH in ${PATCH_FILES:?}
diff --git a/brd_criticallink_mitysbc_es/sw_builds/build_bootloaders.sh b/brd_criticallink_mitysbc_es/sw_builds/build_bootloaders.sh
@@ -4,7 +4,7 @@
 # SPDX-License-Identifier: MIT-0
 #
 
-TAG_NAME="QPDS24.1_REL_AGILEX5_GSRD_PR"
+TAG_NAME="QPDS24.2_REL_GSRD_PR"
 
 # change into the directory of this script
 cd $(dirname ${0})
@@ -91,7 +91,6 @@ ln -s ../arm-trusted-firmware/build/agilex5/release/bl31.bin \
 	|| { echo "ERROR" ; exit 1 ; }
 
 PATCH_FILES="
-../../../common_sw/u-boot_patches/v1-0001-HSD-15015933655-ddr-altera-agilex5-Hack-dual-port-DO-NOT-MERGE.patch \
 ../../../common_sw/u-boot_patches/include-exports.h.patch \
 ../../../common_sw/u-boot_patches/include-configs-socfpga_soc64_common.h.patch \
 ../../../common_sw/u-boot_patches/include-_exports.h.patch \
diff --git a/brd_criticallink_mitysbc_es/sw_builds/build_linux_kernel.sh b/brd_criticallink_mitysbc_es/sw_builds/build_linux_kernel.sh
@@ -4,7 +4,7 @@
 # SPDX-License-Identifier: MIT-0
 #
 
-TAG_NAME="QPDS24.1_REL_AGILEX5_GSRD_PR"
+TAG_NAME="QPDS24.2_REL_GSRD_PR"
 
 # change into the directory of this script
 cd $(dirname ${0})
@@ -67,7 +67,6 @@ make tinyconfig \
 
 # apply patches to the kernel sources
 PATCH_FILES="
-../../../common_sw/linux_patches/0001-Refactored-buffer-allocation-and-buffer-free-to-be-p.patch \
 ../../../common_sw/linux_patches/brd_criticallink_mitysbc_es-arch-arm64-boot-dts-intel-socfpga_agilex5_socdk.dts.patch
 "
 for NEXT_PATCH in ${PATCH_FILES:?}
diff --git a/brd_macnica_sulfur_es_125/sw_builds/build_bootloaders.sh b/brd_macnica_sulfur_es_125/sw_builds/build_bootloaders.sh
@@ -4,7 +4,7 @@
 # SPDX-License-Identifier: MIT-0
 #
 
-TAG_NAME="QPDS24.1_REL_AGILEX5_GSRD_PR"
+TAG_NAME="QPDS24.2_REL_GSRD_PR"
 
 # change into the directory of this script
 cd $(dirname ${0})
@@ -81,7 +81,6 @@ ln -s ../arm-trusted-firmware/build/agilex5/release/bl31.bin \
 	|| { echo "ERROR" ; exit 1 ; }
 
 PATCH_FILES="
-../../../common_sw/u-boot_patches/v1-0001-HSD-15015933655-ddr-altera-agilex5-Hack-dual-port-DO-NOT-MERGE.patch \
 ../../../common_sw/u-boot_patches/include-exports.h.patch \
 ../../../common_sw/u-boot_patches/include-configs-socfpga_soc64_common.h.patch \
 ../../../common_sw/u-boot_patches/include-_exports.h.patch \
diff --git a/brd_macnica_sulfur_es_125/sw_builds/build_linux_kernel.sh b/brd_macnica_sulfur_es_125/sw_builds/build_linux_kernel.sh
@@ -4,7 +4,7 @@
 # SPDX-License-Identifier: MIT-0
 #
 
-TAG_NAME="QPDS24.1_REL_AGILEX5_GSRD_PR"
+TAG_NAME="QPDS24.2_REL_GSRD_PR"
 
 # change into the directory of this script
 cd $(dirname ${0})
@@ -67,7 +67,6 @@ make tinyconfig \
 
 # apply patches to the kernel sources
 PATCH_FILES="
-../../../common_sw/linux_patches/0001-Refactored-buffer-allocation-and-buffer-free-to-be-p.patch \
 ../../../common_sw/linux_patches/brd_macnica_sulfur_es_125-arch-arm64-boot-dts-intel-socfpga_agilex5_socdk.dts.patch
 "
 for NEXT_PATCH in ${PATCH_FILES:?}
diff --git a/brd_macnica_sulfur_es_25/sw_builds/build_bootloaders.sh b/brd_macnica_sulfur_es_25/sw_builds/build_bootloaders.sh
@@ -4,7 +4,7 @@
 # SPDX-License-Identifier: MIT-0
 #
 
-TAG_NAME="QPDS24.1_REL_AGILEX5_GSRD_PR"
+TAG_NAME="QPDS24.2_REL_GSRD_PR"
 
 # change into the directory of this script
 cd $(dirname ${0})
@@ -81,7 +81,6 @@ ln -s ../arm-trusted-firmware/build/agilex5/release/bl31.bin \
 	|| { echo "ERROR" ; exit 1 ; }
 
 PATCH_FILES="
-../../../common_sw/u-boot_patches/v1-0001-HSD-15015933655-ddr-altera-agilex5-Hack-dual-port-DO-NOT-MERGE.patch \
 ../../../common_sw/u-boot_patches/include-exports.h.patch \
 ../../../common_sw/u-boot_patches/include-configs-socfpga_soc64_common.h.patch \
 ../../../common_sw/u-boot_patches/include-_exports.h.patch \
diff --git a/brd_macnica_sulfur_es_25/sw_builds/build_linux_kernel.sh b/brd_macnica_sulfur_es_25/sw_builds/build_linux_kernel.sh
@@ -4,7 +4,7 @@
 # SPDX-License-Identifier: MIT-0
 #
 
-TAG_NAME="QPDS24.1_REL_AGILEX5_GSRD_PR"
+TAG_NAME="QPDS24.2_REL_GSRD_PR"
 
 # change into the directory of this script
 cd $(dirname ${0})
@@ -67,7 +67,6 @@ make tinyconfig \
 
 # apply patches to the kernel sources
 PATCH_FILES="
-../../../common_sw/linux_patches/0001-Refactored-buffer-allocation-and-buffer-free-to-be-p.patch \
 ../../../common_sw/linux_patches/brd_macnica_sulfur_es_25-arch-arm64-boot-dts-intel-socfpga_agilex5_socdk.dts.patch
 "
 for NEXT_PATCH in ${PATCH_FILES:?}
diff --git a/common_sw/devicetree_overlays/hw_config_clk.dts b/common_sw/devicetree_overlays/hw_config_clk.dts
@@ -7,7 +7,7 @@
 /plugin/;
 / {
 	fragment@0 {
-		target-path = "/soc/base_fpga_region";
+		target-path = "/soc@0/base_fpga_region";
 		__overlay__ {
 			firmware-name = "hw_config_clk.rbf";
 			config-complete-timeout-us = <30000000>;
diff --git a/common_sw/devicetree_overlays/hw_f2h_bridge.dts b/common_sw/devicetree_overlays/hw_f2h_bridge.dts
@@ -7,7 +7,7 @@
 /plugin/;
 / {
 	fragment@0 {
-		target-path = "/soc/base_fpga_region";
+		target-path = "/soc@0/base_fpga_region";
 		__overlay__ {
 			firmware-name = "hw_f2h_bridge.rbf";
 			config-complete-timeout-us = <30000000>;
diff --git a/common_sw/devicetree_overlays/hw_f2h_irq.dts b/common_sw/devicetree_overlays/hw_f2h_irq.dts
@@ -7,7 +7,7 @@
 /plugin/;
 / {
 	fragment@0 {
-		target-path = "/soc/base_fpga_region";
+		target-path = "/soc@0/base_fpga_region";
 		__overlay__ {
 			firmware-name = "hw_f2h_irq.rbf";
 			config-complete-timeout-us = <30000000>;
diff --git a/common_sw/devicetree_overlays/hw_f2sdram_bridge.dts b/common_sw/devicetree_overlays/hw_f2sdram_bridge.dts
@@ -7,7 +7,7 @@
 /plugin/;
 / {
 	fragment@0 {
-		target-path = "/soc/base_fpga_region";
+		target-path = "/soc@0/base_fpga_region";
 		__overlay__ {
 			firmware-name = "hw_f2sdram_bridge.rbf";
 			config-complete-timeout-us = <30000000>;
diff --git a/common_sw/devicetree_overlays/hw_h2f_bridge.dts b/common_sw/devicetree_overlays/hw_h2f_bridge.dts
@@ -7,7 +7,7 @@
 /plugin/;
 / {
 	fragment@0 {
-		target-path = "/soc/base_fpga_region";
+		target-path = "/soc@0/base_fpga_region";
 		__overlay__ {
 			firmware-name = "hw_h2f_bridge.rbf";
 			config-complete-timeout-us = <30000000>;
diff --git a/common_sw/devicetree_overlays/hw_h2f_user_clk.dts b/common_sw/devicetree_overlays/hw_h2f_user_clk.dts
@@ -7,7 +7,7 @@
 /plugin/;
 / {
 	fragment@0 {
-		target-path = "/soc/base_fpga_region";
+		target-path = "/soc@0/base_fpga_region";
 		__overlay__ {
 			firmware-name = "hw_h2f_user_clk.rbf";
 			config-complete-timeout-us = <30000000>;
diff --git a/common_sw/devicetree_overlays/hw_hps_gp.dts b/common_sw/devicetree_overlays/hw_hps_gp.dts
@@ -7,7 +7,7 @@
 /plugin/;
 / {
 	fragment@0 {
-		target-path = "/soc/base_fpga_region";
+		target-path = "/soc@0/base_fpga_region";
 		__overlay__ {
 			firmware-name = "hw_hps_gp.rbf";
 			config-complete-timeout-us = <30000000>;
diff --git a/common_sw/devicetree_overlays/hw_hps_jamb.dts b/common_sw/devicetree_overlays/hw_hps_jamb.dts
@@ -7,7 +7,7 @@
 /plugin/;
 / {
 	fragment@0 {
-		target-path = "/soc/base_fpga_region";
+		target-path = "/soc@0/base_fpga_region";
 		__overlay__ {
 			firmware-name = "hw_hps_jamb.rbf";
 			config-complete-timeout-us = <30000000>;
diff --git a/common_sw/devicetree_overlays/hw_i2c_bridge.dts b/common_sw/devicetree_overlays/hw_i2c_bridge.dts
@@ -7,7 +7,7 @@
 /plugin/;
 / {
 	fragment@0 {
-		target-path = "/soc/base_fpga_region";
+		target-path = "/soc@0/base_fpga_region";
 		__overlay__ {
 			firmware-name = "hw_i2c_bridge.rbf";
 			config-complete-timeout-us = <30000000>;
diff --git a/common_sw/devicetree_overlays/hw_i2c_bridge_drvr.dts b/common_sw/devicetree_overlays/hw_i2c_bridge_drvr.dts
@@ -7,14 +7,14 @@
 /plugin/;
 / {
 	fragment@0 {
-		target-path = "/soc/base_fpga_region";
+		target-path = "/soc@0/base_fpga_region";
 		__overlay__ {
 			firmware-name = "hw_i2c_bridge.rbf";
 			config-complete-timeout-us = <30000000>;
 		};
 	};
 	fragment@1 {
-		target-path = "/soc/i2c@10c02800";
+		target-path = "/soc@0/i2c@10c02800";
 		__overlay__ {
 			status = "okay";
 		};
diff --git a/common_sw/devicetree_overlays/hw_lwh2f_bridge.dts b/common_sw/devicetree_overlays/hw_lwh2f_bridge.dts
@@ -7,7 +7,7 @@
 /plugin/;
 / {
 	fragment@0 {
-		target-path = "/soc/base_fpga_region";
+		target-path = "/soc@0/base_fpga_region";
 		__overlay__ {
 			firmware-name = "hw_lwh2f_bridge.rbf";
 			config-complete-timeout-us = <30000000>;
diff --git a/common_sw/devicetree_overlays/hw_no_periph.dts b/common_sw/devicetree_overlays/hw_no_periph.dts
@@ -7,7 +7,7 @@
 /plugin/;
 / {
 	fragment@0 {
-		target-path = "/soc/base_fpga_region";
+		target-path = "/soc@0/base_fpga_region";
 		__overlay__ {
 			firmware-name = "hw_no_periph.rbf";
 			config-complete-timeout-us = <30000000>;
diff --git a/common_sw/devicetree_overlays/hw_spi_bridge.dts b/common_sw/devicetree_overlays/hw_spi_bridge.dts
@@ -7,7 +7,7 @@
 /plugin/;
 / {
 	fragment@0 {
-		target-path = "/soc/base_fpga_region";
+		target-path = "/soc@0/base_fpga_region";
 		__overlay__ {
 			firmware-name = "hw_spi_bridge.rbf";
 			config-complete-timeout-us = <30000000>;
diff --git a/common_sw/devicetree_overlays/hw_spi_bridge_drvr.dts b/common_sw/devicetree_overlays/hw_spi_bridge_drvr.dts
@@ -7,14 +7,14 @@
 /plugin/;
 / {
 	fragment@0 {
-		target-path = "/soc/base_fpga_region";
+		target-path = "/soc@0/base_fpga_region";
 		__overlay__ {
 			firmware-name = "hw_spi_bridge.rbf";
 			config-complete-timeout-us = <30000000>;
 		};
 	};
 	fragment@1 {
-		target-path = "/soc/spi@10da4000";
+		target-path = "/soc@0/spi@10da4000";
 		__overlay__ {
 			#address-cells = <1>;
 			#size-cells = <0>;
diff --git a/common_sw/devicetree_overlays/hw_uart.dts b/common_sw/devicetree_overlays/hw_uart.dts
@@ -7,7 +7,7 @@
 /plugin/;
 / {
 	fragment@0 {
-		target-path = "/soc/base_fpga_region";
+		target-path = "/soc@0/base_fpga_region";
 		__overlay__ {
 			firmware-name = "hw_uart.rbf";
 			config-complete-timeout-us = <30000000>;
diff --git a/common_sw/devicetree_overlays/hw_uart0_drvr.dts b/common_sw/devicetree_overlays/hw_uart0_drvr.dts
@@ -7,14 +7,14 @@
 /plugin/;
 / {
 	fragment@0 {
-		target-path = "/soc/base_fpga_region";
+		target-path = "/soc@0/base_fpga_region";
 		__overlay__ {
 			firmware-name = "hw_uart.rbf";
 			config-complete-timeout-us = <30000000>;
 		};
 	};
 	fragment@1 {
-		target-path = "/soc/serial@10c02000";
+		target-path = "/soc@0/serial@10c02000";
 		__overlay__ {
 			status = "okay";
 		};
@@ -23,7 +23,7 @@
 	fragment@2 {
 		target-path = "/aliases";
 		__overlay__ {
-			serial1 = "/soc/serial@10c02000";
+			serial1 = "/soc@0/serial@10c02000";
 		};
 	};
 */
diff --git a/common_sw/devicetree_overlays/hw_uart1_drvr.dts b/common_sw/devicetree_overlays/hw_uart1_drvr.dts
@@ -7,14 +7,14 @@
 /plugin/;
 / {
 	fragment@0 {
-		target-path = "/soc/base_fpga_region";
+		target-path = "/soc@0/base_fpga_region";
 		__overlay__ {
 			firmware-name = "hw_uart.rbf";
 			config-complete-timeout-us = <30000000>;
 		};
 	};
 	fragment@1 {
-		target-path = "/soc/serial@10c02100";
+		target-path = "/soc@0/serial@10c02100";
 		__overlay__ {
 			status = "okay";
 		};
@@ -23,7 +23,7 @@
 	fragment@2 {
 		target-path = "/aliases";
 		__overlay__ {
-			serial1 = "/soc/serial@10c02100";
+			serial1 = "/soc@0/serial@10c02100";
 		};
 	};
 */
diff --git a/common_sw/linux_patches/0001-Refactored-buffer-allocation-and-buffer-free-to-be-p.patch b/common_sw/linux_patches/0001-Refactored-buffer-allocation-and-buffer-free-to-be-p.patch
diff --git a/common_sw/linux_patches/brd_altera_a5e065_premium_es-arch-arm64-boot-dts-intel-socfpga_agilex5_socdk.dts.patch b/common_sw/linux_patches/brd_altera_a5e065_premium_es-arch-arm64-boot-dts-intel-socfpga_agilex5_socdk.dts.patch
diff --git a/common_sw/linux_patches/brd_arrow_axe5_eagle_es-arch-arm64-boot-dts-intel-socfpga_agilex5_socdk.dts.patch b/common_sw/linux_patches/brd_arrow_axe5_eagle_es-arch-arm64-boot-dts-intel-socfpga_agilex5_socdk.dts.patch
diff --git a/common_sw/linux_patches/brd_criticallink_mitysbc_es-arch-arm64-boot-dts-intel-socfpga_agilex5_socdk.dts.patch b/common_sw/linux_patches/brd_criticallink_mitysbc_es-arch-arm64-boot-dts-intel-socfpga_agilex5_socdk.dts.patch
diff --git a/common_sw/linux_patches/brd_macnica_sulfur_es_125-arch-arm64-boot-dts-intel-socfpga_agilex5_socdk.dts.patch b/common_sw/linux_patches/brd_macnica_sulfur_es_125-arch-arm64-boot-dts-intel-socfpga_agilex5_socdk.dts.patch
diff --git a/common_sw/linux_patches/brd_macnica_sulfur_es_25-arch-arm64-boot-dts-intel-socfpga_agilex5_socdk.dts.patch b/common_sw/linux_patches/brd_macnica_sulfur_es_25-arch-arm64-boot-dts-intel-socfpga_agilex5_socdk.dts.patch
diff --git a/common_sw/u-boot_patches/v1-0001-HSD-15015933655-ddr-altera-agilex5-Hack-dual-port-DO-NOT-MERGE.patch b/common_sw/u-boot_patches/v1-0001-HSD-15015933655-ddr-altera-agilex5-Hack-dual-port-DO-NOT-MERGE.patch
diff --git a/common_sw/u-boot_scripts/start-linux b/common_sw/u-boot_scripts/start-linux
diff --git a/repo_downloads/download_repos.sh b/repo_downloads/download_repos.sh

Original file line number	Diff line number	Diff line change
`@@ -4,7 +4,7 @@`
`4`	`4`	`# SPDX-License-Identifier: MIT-0`
`5`	`5`	`#`
`6`	`6`
`7`		`-TAG_NAME="QPDS24.1_REL_AGILEX5_GSRD_PR"`
	`7`	`+TAG_NAME="QPDS24.2_REL_GSRD_PR"`
`8`	`8`
`9`	`9`	`# change into the directory of this script`
`10`	`10`	`cd $(dirname ${0})`
`@@ -67,7 +67,6 @@ make tinyconfig \`
`67`	`67`
`68`	`68`	`# apply patches to the kernel sources`
`69`	`69`	`PATCH_FILES="`
`70`		`-../../../common_sw/linux_patches/0001-Refactored-buffer-allocation-and-buffer-free-to-be-p.patch \`
`71`	`70`	`../../../common_sw/linux_patches/brd_altera_a5e065_premium_es-arch-arm64-boot-dts-intel-socfpga_agilex5_socdk.dts.patch`
`72`	`71`	`"`
`73`	`72`	`for NEXT_PATCH in ${PATCH_FILES:?}`