@@ -58,28 +58,29 @@ def test_signature(self):
5858
5959 def test_signature_wrong (self ):
6060 with self .assertRaisesRegex (TypeError ,
61- "^`addr_width` must be a non-negative int , not -2$" ):
61+ r"^Address width must be a non-negative integer , not -2$" ):
6262 memory .WritePort .Signature (addr_width = - 2 , shape = 8 )
6363 with self .assertRaisesRegex (TypeError ,
64- "^Granularity must be a non-negative int or None, not -2$" ):
64+ r "^Granularity must be a non-negative integer or None, not -2$" ):
6565 memory .WritePort .Signature (addr_width = 4 , shape = 8 , granularity = - 2 )
6666 with self .assertRaisesRegex (ValueError ,
67- "^Granularity cannot be specified with signed shape$" ):
67+ r "^Granularity cannot be specified for a memory with a signed shape$" ):
6868 memory .WritePort .Signature (addr_width = 2 , shape = signed (8 ), granularity = 2 )
6969 with self .assertRaisesRegex (TypeError ,
70- "^Granularity can only be specified for plain unsigned `Shape` or `ArrayLayout`$" ):
70+ r"^Granularity can only be specified for memories whose shape is unsigned or "
71+ r"data.ArrayLayout$" ):
7172 memory .WritePort .Signature (addr_width = 2 , shape = MyStruct , granularity = 2 )
7273 with self .assertRaisesRegex (ValueError ,
73- "^Granularity must be positive$" ):
74+ r "^Granularity must be positive$" ):
7475 memory .WritePort .Signature (addr_width = 2 , shape = 8 , granularity = 0 )
7576 with self .assertRaisesRegex (ValueError ,
76- "^Granularity must be positive$" ):
77+ r "^Granularity must be positive$" ):
7778 memory .WritePort .Signature (addr_width = 2 , shape = data .ArrayLayout (8 , 8 ), granularity = 0 )
7879 with self .assertRaisesRegex (ValueError ,
79- "^Granularity must divide data width$" ):
80+ r "^Granularity must evenly divide data width$" ):
8081 memory .WritePort .Signature (addr_width = 2 , shape = 8 , granularity = 3 )
8182 with self .assertRaisesRegex (ValueError ,
82- "^Granularity must divide data array length$" ):
83+ r "^Granularity must evenly divide data array length$" ):
8384 memory .WritePort .Signature (addr_width = 2 , shape = data .ArrayLayout (8 , 8 ), granularity = 3 )
8485
8586 def test_signature_eq (self ):
@@ -134,17 +135,17 @@ def test_constructor(self):
134135 def test_constructor_wrong (self ):
135136 signature = memory .ReadPort .Signature (shape = 8 , addr_width = 4 )
136137 with self .assertRaisesRegex (TypeError ,
137- r"^Expected ` WritePort.Signature` , not ReadPort.Signature\(.*\)$" ):
138+ r"^Expected signature to be WritePort.Signature, not ReadPort.Signature\(.*\)$" ):
138139 memory .WritePort (signature , memory = None , domain = "sync" )
139140 signature = memory .WritePort .Signature (shape = 8 , addr_width = 4 , granularity = 2 )
140141 with self .assertRaisesRegex (TypeError ,
141- r"^Domain has to be a string, not None$" ):
142+ r"^Domain must be a string, not None$" ):
142143 memory .WritePort (signature , memory = None , domain = None )
143144 with self .assertRaisesRegex (TypeError ,
144- r"^Expected ` Memory` or ` None` , not 'a'$" ):
145+ r"^Expected memory to be Memory or None, not 'a'$" ):
145146 memory .WritePort (signature , memory = "a" , domain = "sync" )
146147 with self .assertRaisesRegex (ValueError ,
147- r"^Write port domain cannot be \"comb\" $" ):
148+ r"^Write ports cannot be asynchronous $" ):
148149 memory .WritePort (signature , memory = None , domain = "comb" )
149150 signature = memory .WritePort .Signature (shape = 8 , addr_width = 4 )
150151 m = memory .Memory (depth = 8 , shape = 8 , init = [])
@@ -186,7 +187,7 @@ def test_signature(self):
186187
187188 def test_signature_wrong (self ):
188189 with self .assertRaisesRegex (TypeError ,
189- "^`addr_width` must be a non-negative int , not -2$" ):
190+ "^Address width must be a non-negative integer , not -2$" ):
190191 memory .ReadPort .Signature (addr_width = - 2 , shape = 8 )
191192
192193 def test_signature_eq (self ):
@@ -245,14 +246,14 @@ def test_constructor(self):
245246 def test_constructor_wrong (self ):
246247 signature = memory .WritePort .Signature (shape = 8 , addr_width = 4 )
247248 with self .assertRaisesRegex (TypeError ,
248- r"^Expected ` ReadPort.Signature` , not WritePort.Signature\(.*\)$" ):
249+ r"^Expected signature to be ReadPort.Signature, not WritePort.Signature\(.*\)$" ):
249250 memory .ReadPort (signature , memory = None , domain = "sync" )
250251 signature = memory .ReadPort .Signature (shape = 8 , addr_width = 4 )
251252 with self .assertRaisesRegex (TypeError ,
252- r"^Domain has to be a string, not None$" ):
253+ r"^Domain must be a string, not None$" ):
253254 memory .ReadPort (signature , memory = None , domain = None )
254255 with self .assertRaisesRegex (TypeError ,
255- r"^Expected ` Memory` or ` None` , not 'a'$" ):
256+ r"^Expected memory to be Memory or None, not 'a'$" ):
256257 memory .ReadPort (signature , memory = "a" , domain = "sync" )
257258 signature = memory .ReadPort .Signature (shape = 8 , addr_width = 4 )
258259 m = memory .Memory (depth = 8 , shape = 8 , init = [])
@@ -266,15 +267,15 @@ def test_constructor_wrong(self):
266267 m = memory .Memory (depth = 16 , shape = 8 , init = [])
267268 port = m .read_port ()
268269 with self .assertRaisesRegex (TypeError ,
269- r"^`transparent_for` must contain only ` WritePort` instances$" ):
270+ r"^Transparency set must contain only WritePort instances$" ):
270271 memory .ReadPort (signature , memory = m , domain = "sync" , transparent_for = [port ])
271272 write_port = m .write_port ()
272273 m2 = memory .Memory (depth = 16 , shape = 8 , init = [])
273274 with self .assertRaisesRegex (ValueError ,
274- r"^Transparent write ports must belong to the same memory$" ):
275+ r"^Ports in transparency set must belong to the same memory$" ):
275276 memory .ReadPort (signature , memory = m2 , domain = "sync" , transparent_for = [write_port ])
276277 with self .assertRaisesRegex (ValueError ,
277- r"^Transparent write ports must belong to the same domain$" ):
278+ r"^Ports in transparency set must belong to the same domain$" ):
278279 memory .ReadPort (signature , memory = m , domain = "other" , transparent_for = [write_port ])
279280
280281
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