Commit d44a3c3
Fill in CGB register holes in the Memory_Map page (#603)
* Fill in CGB register holes in the Memory_Map page
I was implementing BESS support and needed a quick reference for which
registers are mapped or unmapped, DMG+ or CGB+, and so on. And luckily
the specification called out KEY0 explicitly or I would have missed
these four registers.
I'm adding them to the main MMIO table for that reason, as I believe it
should be reliable for the use case of quickly determining used and
unused addresses.
I did not include undocumented CGB registers because they can be treated
as though they are unused.
I also did not add a documentation section for KEY0 even though it
stands out as not having a link. If someone were to write up a
description of that register they could come back and wire up the link
here.
In the meantime it would also be reasonable to link the whole box to
KEY1, link to the CGB registers page, or link to the relevant section of
the Power Up Sequence page. Whichever you feel is most appropriate.
* Added link to KEY0 documentation
Co-authored by: alloncm <alloncm@gmail.com>
* Update header names to match master branch
---------
Co-authored-by: Antonio Vivace <avivace4@gmail.com>1 parent a9a3c0b commit d44a3c3
1 file changed
+3
-0
lines changed| Original file line number | Diff line number | Diff line change | |
|---|---|---|---|
| |||
30 | 30 | | |
31 | 31 | | |
32 | 32 | | |
| 33 | + | |
33 | 34 | | |
34 | 35 | | |
35 | 36 | | |
| 37 | + | |
36 | 38 | | |
| 39 | + | |
37 | 40 | | |
38 | 41 | | |
39 | 42 | | |
| |||
0 commit comments