Fix OpVariable creation during memset translation (#3436)

MrSidims · jsji · commit 12497a1e54c1 · 2025-11-17T20:40:18.000-08:00
It should be a function-level OpVariable, not Global var. Fixes KhronosGroup/SPIRV-LLVM-Translator#3402 Signed-off-by: Dmitry Sidorov <dmitry.sidorov@intel.com> Original commit: KhronosGroup/SPIRV-LLVM-Translator@8ef804541897a80
diff --git a/llvm-spirv/lib/SPIRV/SPIRVWriter.cpp b/llvm-spirv/lib/SPIRV/SPIRVWriter.cpp
@@ -4858,16 +4858,17 @@ SPIRVValue *LLVMToSPIRVBase::transIntrinsicInst(IntrinsicInst *II,
       std::vector<SPIRVValue *> Elts(TNumElts, transValue(Val, BB));
       Init = BM->addCompositeConstant(CompositeTy, Elts);
     }
-    SPIRVType *VarTy = transPointerType(AT, SPIRV::SPIRAS_Constant);
-    SPIRVValue *Var = BM->addVariable(VarTy, nullptr, /*isConstant*/ true,
+    SPIRVType *VarTy = transPointerType(AT, SPIRV::SPIRAS_Private);
+    SPIRVBasicBlock *EntryBB = BB->getParent()->getBasicBlock(0);
+    SPIRVValue *Var = BM->addVariable(VarTy, nullptr, /*isConstant*/ false,
                                       spv::internal::LinkageTypeInternal, Init,
-                                      "", StorageClassUniformConstant, nullptr);
+                                      "", StorageClassFunction, EntryBB);
     std::vector<SPIRVWord> MemAccess = GetMemoryAccess(
         MSI, BM->isAllowedToUseVersion(VersionNumber::SPIRV_1_4));
     if (!MemAccess.empty() && MemAccess[0] == MemoryAccessAlignedMask)
       Var->setAlignment(MemAccess[1]);
     SPIRVType *SourceTy =
-        transPointerType(Val->getType(), SPIRV::SPIRAS_Constant);
+        transPointerType(Val->getType(), SPIRV::SPIRAS_Private);
     SPIRVValue *Source = BM->addUnaryInst(OpBitcast, SourceTy, Var, BB);
     SPIRVValue *Target = transValue(MSI->getRawDest(), BB);
     return BM->addCopyMemorySizedInst(Target, Source, CompositeTy->getLength(),
diff --git a/llvm-spirv/test/llvm-intrinsics/memset-align.ll b/llvm-spirv/test/llvm-intrinsics/memset-align.ll
@@ -2,6 +2,7 @@
 ; RUN: llvm-spirv %t.bc -spirv-text -o %t.txt
 ; RUN: FileCheck < %t.txt %s --check-prefix=CHECK-SPIRV
 ; RUN: llvm-spirv %t.bc -o %t.spv
+; RUN: spirv-val %t.spv
 ; RUN: llvm-spirv -r %t.spv -o %t.rev.bc
 ; RUN: llvm-dis %t.rev.bc
 ; RUN: FileCheck < %t.rev.ll %s --check-prefix=CHECK-LLVM
@@ -16,12 +17,14 @@ entry:
 
 ; CHECK-SPIRV: Decorate [[#]] Alignment 16
 ; CHECK-SPIRV: Decorate [[#SrcVar:]] Alignment [[#SrcAlignment:]]
+; CHECK-SPIRV: Variable [[#]] [[#SrcVar]] 7
 ; CHECK-SPIRV: Bitcast [[#]] [[#]] [[#]]
 ; CHECK-SPIRV: Bitcast [[#]] [[#Src:]] [[#SrcVar]]
 ; CHECK-SPIRV: CopyMemorySized [[#]] [[#Src]] [[#]] 2 [[#SrcAlignment]]
-; CHECK-LLVM: [[SrcVar:@[0-9]+]] = internal unnamed_addr addrspace(2) constant [16 x i8] zeroinitializer, align [[#SrcAlignment:]]
-; CHECK-LLVM: [[SrcOp:%[0-9]+]] = bitcast ptr addrspace(2) [[SrcVar]] to ptr addrspace(2)
-; CHECK-LLVM: call void @llvm.memcpy.p4.p2.i64(ptr addrspace(4) align 16 %0, ptr addrspace(2) align [[#SrcAlignment]] [[SrcOp]], i64 16, i1 false)
+; CHECK-LLVM: %{{[0-9]+}} = alloca [16 x i8], align [[#SrcAlignment:]]
+; CHECK-LLVM: store [16 x i8] zeroinitializer, ptr %{{[0-9]+}}, align 1
+; CHECK-LLVM: [[SrcOp:%[0-9]+]] = bitcast ptr %{{[0-9]+}} to ptr
+; CHECK-LLVM: call void @llvm.memcpy.p4.p0.i64(ptr addrspace(4) align 16 %{{[0-9]+}}, ptr align [[#SrcAlignment]] [[SrcOp]], i64 16, i1 false)
   call void @llvm.memset.p4.i64(ptr addrspace(4) align 16 %r.sroa.0.0.r.ascast.sroa_cast1, i8 0, i64 16, i1 false)
   ret void
 }
diff --git a/llvm-spirv/test/llvm-intrinsics/memset-opaque.ll b/llvm-spirv/test/llvm-intrinsics/memset-opaque.ll
@@ -20,14 +20,14 @@
 ; CHECK-SPIRV: TypeArray [[Int8x4:[0-9]+]] [[Int8]] [[Lenmemset21]]
 ; CHECK-SPIRV-TYPED-PTR: TypePointer [[Int8Ptr:[0-9]+]] 8 [[Int8]]
 ; CHECK-SPIRV: TypeArray [[Int8x12:[0-9]+]] [[Int8]] [[Lenmemset0]]
-; CHECK-SPIRV-TYPED-PTR: TypePointer [[Int8PtrConst:[0-9]+]] 0 [[Int8]]
-; CHECK-SPIRV-UNTYPED-PTR: TypeUntypedPointerKHR [[Int8PtrConst:[0-9]+]] 0
+; CHECK-SPIRV-TYPED-PTR: TypePointer [[Int8PtrConst:[0-9]+]] 7 [[Int8]]
+; CHECK-SPIRV-UNTYPED-PTR: TypeUntypedPointerKHR [[Int8PtrConst:[0-9]+]] 7
 
 ; CHECK-SPIRV: ConstantNull [[Int8x12]] [[Init:[0-9]+]]
-; CHECK-SPIRV: Variable {{[0-9]+}} [[Val:[0-9]+]] 0 [[Init]]
 ; CHECK-SPIRV: 7 ConstantComposite [[Int8x4]] [[InitComp:[0-9]+]] [[Const21]] [[Const21]] [[Const21]] [[Const21]]
-; CHECK-SPIRV: Variable {{[0-9]+}} [[ValComp:[0-9]+]] 0 [[InitComp]]
 ; CHECK-SPIRV: ConstantFalse [[#]] [[#False:]]
+; CHECK-SPIRV: Variable {{[0-9]+}} [[Val:[0-9]+]] 7 [[Init]]
+; CHECK-SPIRV: Variable {{[0-9]+}} [[ValComp:[0-9]+]] 7 [[InitComp]]
 
 ; CHECK-SPIRV: Bitcast [[Int8Ptr]] [[Target:[0-9]+]] {{[0-9]+}}
 ; CHECK-SPIRV: Bitcast [[Int8PtrConst]] [[Source:[0-9]+]] [[Val]]
@@ -68,16 +68,18 @@ target triple = "spir"
 
 %struct.S1 = type { i32, i32, i32 }
 
-; CHECK-LLVM-OPAQUE: internal unnamed_addr addrspace(2) constant [12 x i8] zeroinitializer
-; CHECK-LLVM-OPAQUE: internal unnamed_addr addrspace(2) constant [4 x i8] c"\15\15\15\15"
+; CHECK-LLVM-OPAQUE: %{{[0-9]+}} = alloca [12 x i8], align 4
+; CHECK-LLVM-OPAQUE: store [12 x i8] zeroinitializer, ptr %{{[0-9]+}}, align 1
+; CHECK-LLVM-OPAQUE: %{{[0-9]+}} = alloca [4 x i8], align 4
+; CHECK-LLVM-OPAQUE: store [4 x i8] c"\15\15\15\15", ptr %{{[0-9]+}}, align 1
 
 ; Function Attrs: nounwind
 define spir_func void @_Z5foo11v(ptr addrspace(4) noalias captures(none) sret(%struct.S1) %agg.result, i32 %s1, i64 %s2, i8 %v) #0 {
   %x = alloca [4 x i8]
   tail call void @llvm.memset.p4.i32(ptr addrspace(4) align 4 %agg.result, i8 0, i32 12, i1 false)
-; CHECK-LLVM-OPAQUE: call void @llvm.memcpy.p4.p2.i32(ptr addrspace(4) align 4 %1, ptr addrspace(2) align 4 %2, i32 12, i1 false)
+; CHECK-LLVM-OPAQUE: call void @llvm.memcpy.p4.p0.i32(ptr addrspace(4) align 4 %{{[0-9]+}}, ptr align 4 %{{[0-9]+}}, i32 12, i1 false)
   tail call void @llvm.memset.p0.i32(ptr align 4 %x, i8 21, i32 4, i1 false)
-; CHECK-LLVM-OPAQUE: call void @llvm.memcpy.p0.p2.i32(ptr align 4 %3, ptr addrspace(2) align 4 %4, i32 4, i1 false)
+; CHECK-LLVM-OPAQUE: call void @llvm.memcpy.p0.p0.i32(ptr align 4 %{{[0-9]+}}, ptr align 4 %{{[0-9]+}}, i32 4, i1 false)
 
   ; non-const value
   tail call void @llvm.memset.p0.i32(ptr align 4 %x, i8 %v, i32 3, i1 false)
diff --git a/llvm-spirv/test/transcoding/intrinsic_result_store.ll b/llvm-spirv/test/transcoding/intrinsic_result_store.ll
@@ -2,21 +2,23 @@
 ; with subsequent store instructions.
 
 ; RUN: llvm-spirv %s -o %t.spv
+; RUN: spirv-val %t.spv
 ; RUN: llvm-spirv -r %t.spv -o %t.rev.bc
 ; RUN: llvm-dis < %t.rev.bc | FileCheck %s --check-prefix=CHECK-LLVM
 
 target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024"
 target triple = "spir64-unknown-unknown"
 
-; CHECK-LLVM: [[ZERO_INIT:@[0-9]+]] = {{.*}} addrspace(2) constant [8 x i8] zeroinitializer
+; CHECK-LLVM: %[[ZERO_INIT:[0-9]+]] = alloca [8 x i8], align 8
+; CHECK-LLVM: store [8 x i8] zeroinitializer, ptr %[[ZERO_INIT]], align 1
 
 ; Function Attrs: convergent noinline nounwind optnone
 define spir_kernel void @test_memset(ptr addrspace(1) %data, i32 %input) #0 !kernel_arg_addr_space !1 !kernel_arg_access_qual !5 !kernel_arg_type !6 !kernel_arg_base_type !6 !kernel_arg_type_qual !7 {
 entry:
 ; CHECK-LLVM: %[[BITCAST_RES:[[:alnum:].]+]] = bitcast ptr addrspace(1) %{{[[:alnum:].]+}} to ptr addrspace(1)
   %ptr = bitcast ptr addrspace(1) %data to ptr addrspace(1)
-; CHECK-LLVM: %[[#ZERO_INIT_BITCAST:]] = bitcast ptr addrspace(2) [[ZERO_INIT]] to ptr addrspace(2)
-; CHECK-LLVM: call void @llvm.memcpy.p1.p2.i64(ptr addrspace(1) align 8 %[[BITCAST_RES]], ptr addrspace(2) align 8 %[[#ZERO_INIT_BITCAST]], i64 8, i1 false)
+; CHECK-LLVM: %[[#ZERO_INIT_BITCAST:]] = bitcast ptr %[[ZERO_INIT]] to ptr
+; CHECK-LLVM: call void @llvm.memcpy.p1.p0.i64(ptr addrspace(1) align 8 %[[BITCAST_RES]], ptr align 8 %[[#ZERO_INIT_BITCAST]], i64 8, i1 false)
   call void @llvm.memset.p1.i64(ptr addrspace(1) align 8 %ptr, i8 0, i64 8, i1 false)
 ; CHECK-LLVM: store i8 0, ptr addrspace(1) %[[BITCAST_RES]]
   store i8 0, ptr addrspace(1) %ptr
