[CodeGen][NewPM] Port RegUsageInfoCollector pass to NPM (#113874)

Author: optimisan

llvm/include/llvm/CodeGen/RegUsageInfoCollector.h

@@ -0,0 +1,25 @@
+//===- llvm/CodeGen/RegUsageInfoCollector.h ---------------------*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef LLVM_CODEGEN_REGUSAGEINFOCOLLECTOR_H
+#define LLVM_CODEGEN_REGUSAGEINFOCOLLECTOR_H
+
+#include "llvm/CodeGen/MachinePassManager.h"
+
+namespace llvm {
+
+class RegUsageInfoCollectorPass
+    : public AnalysisInfoMixin<RegUsageInfoCollectorPass> {
+public:
+  PreservedAnalyses run(MachineFunction &MF,
+                        MachineFunctionAnalysisManager &MFAM);
+};
+
+} // namespace llvm
+
+#endif // LLVM_CODEGEN_REGUSAGEINFOCOLLECTOR_H

llvm/include/llvm/InitializePasses.h

@@ -258,7 +258,7 @@ void initializeRegAllocPriorityAdvisorAnalysisPass(PassRegistry &);
 void initializeRegAllocScoringPass(PassRegistry &);
 void initializeRegBankSelectPass(PassRegistry &);
 void initializeRegToMemWrapperPassPass(PassRegistry &);
-void initializeRegUsageInfoCollectorPass(PassRegistry &);
+void initializeRegUsageInfoCollectorLegacyPass(PassRegistry &);
 void initializeRegUsageInfoPropagationPass(PassRegistry &);
 void initializeRegionInfoPassPass(PassRegistry &);
 void initializeRegionOnlyPrinterPass(PassRegistry &);

llvm/include/llvm/Passes/CodeGenPassBuilder.h

@@ -54,6 +54,7 @@
 #include "llvm/CodeGen/PHIElimination.h"
 #include "llvm/CodeGen/PreISelIntrinsicLowering.h"
 #include "llvm/CodeGen/RegAllocFast.h"
+#include "llvm/CodeGen/RegUsageInfoCollector.h"
 #include "llvm/CodeGen/RegisterUsageInfo.h"
 #include "llvm/CodeGen/ReplaceWithVeclib.h"
 #include "llvm/CodeGen/SafeStack.h"

llvm/include/llvm/Passes/MachinePassRegistry.def

@@ -157,6 +157,7 @@ MACHINE_FUNCTION_PASS("print<machine-post-dom-tree>",
                       MachinePostDominatorTreePrinterPass(dbgs()))
 MACHINE_FUNCTION_PASS("print<slot-indexes>", SlotIndexesPrinterPass(dbgs()))
 MACHINE_FUNCTION_PASS("print<virtregmap>", VirtRegMapPrinterPass(dbgs()))
+MACHINE_FUNCTION_PASS("reg-usage-collector", RegUsageInfoCollectorPass())
 MACHINE_FUNCTION_PASS("require-all-machine-function-properties",
                       RequireAllMachineFunctionPropertiesPass())
 MACHINE_FUNCTION_PASS("stack-coloring", StackColoringPass())
@@ -251,7 +252,6 @@ DUMMY_MACHINE_FUNCTION_PASS("prologepilog-code", PrologEpilogCodeInserterPass)
 DUMMY_MACHINE_FUNCTION_PASS("ra-basic", RABasicPass)
 DUMMY_MACHINE_FUNCTION_PASS("ra-greedy", RAGreedyPass)
 DUMMY_MACHINE_FUNCTION_PASS("ra-pbqp", RAPBQPPass)
-DUMMY_MACHINE_FUNCTION_PASS("reg-usage-collector", RegUsageInfoCollectorPass)
 DUMMY_MACHINE_FUNCTION_PASS("reg-usage-propagation", RegUsageInfoPropagationPass)
 DUMMY_MACHINE_FUNCTION_PASS("regalloc", RegAllocPass)
 DUMMY_MACHINE_FUNCTION_PASS("regallocscoringpass", RegAllocScoringPass)

llvm/lib/CodeGen/CodeGen.cpp

@@ -113,7 +113,7 @@ void llvm::initializeCodeGen(PassRegistry &Registry) {
   initializeRABasicPass(Registry);
   initializeRAGreedyPass(Registry);
   initializeRegAllocFastPass(Registry);
-  initializeRegUsageInfoCollectorPass(Registry);
+  initializeRegUsageInfoCollectorLegacyPass(Registry);
   initializeRegUsageInfoPropagationPass(Registry);
   initializeRegisterCoalescerPass(Registry);
   initializeRemoveLoadsIntoFakeUsesPass(Registry);

llvm/lib/CodeGen/RegUsageInfoCollector.cpp

@@ -16,9 +16,11 @@
 ///
 //===----------------------------------------------------------------------===//
 
+#include "llvm/CodeGen/RegUsageInfoCollector.h"
 #include "llvm/ADT/Statistic.h"
 #include "llvm/CodeGen/MachineFunctionPass.h"
 #include "llvm/CodeGen/MachineOperand.h"
+#include "llvm/CodeGen/MachinePassManager.h"
 #include "llvm/CodeGen/MachineRegisterInfo.h"
 #include "llvm/CodeGen/Passes.h"
 #include "llvm/CodeGen/RegisterUsageInfo.h"
@@ -36,11 +38,23 @@ STATISTIC(NumCSROpt,
 
 namespace {
 
-class RegUsageInfoCollector : public MachineFunctionPass {
+class RegUsageInfoCollector {
+  PhysicalRegisterUsageInfo &PRUI;
+
 public:
-  RegUsageInfoCollector() : MachineFunctionPass(ID) {
-    PassRegistry &Registry = *PassRegistry::getPassRegistry();
-    initializeRegUsageInfoCollectorPass(Registry);
+  RegUsageInfoCollector(PhysicalRegisterUsageInfo &PRUI) : PRUI(PRUI) {}
+  bool run(MachineFunction &MF);
+
+  // Call getCalleeSaves and then also set the bits for subregs and
+  // fully saved superregs.
+  static void computeCalleeSavedRegs(BitVector &SavedRegs, MachineFunction &MF);
+};
+
+class RegUsageInfoCollectorLegacy : public MachineFunctionPass {
+public:
+  static char ID;
+  RegUsageInfoCollectorLegacy() : MachineFunctionPass(ID) {
+    initializeRegUsageInfoCollectorLegacyPass(*PassRegistry::getPassRegistry());
   }
 
   StringRef getPassName() const override {
@@ -54,26 +68,19 @@ class RegUsageInfoCollector : public MachineFunctionPass {
   }
 
   bool runOnMachineFunction(MachineFunction &MF) override;
-
-  // Call getCalleeSaves and then also set the bits for subregs and
-  // fully saved superregs.
-  static void computeCalleeSavedRegs(BitVector &SavedRegs, MachineFunction &MF);
-
-  static char ID;
 };
-
 } // end of anonymous namespace
 
-char RegUsageInfoCollector::ID = 0;
+char RegUsageInfoCollectorLegacy::ID = 0;
 
-INITIALIZE_PASS_BEGIN(RegUsageInfoCollector, "RegUsageInfoCollector",
+INITIALIZE_PASS_BEGIN(RegUsageInfoCollectorLegacy, "RegUsageInfoCollector",
                       "Register Usage Information Collector", false, false)
 INITIALIZE_PASS_DEPENDENCY(PhysicalRegisterUsageInfoWrapperLegacy)
-INITIALIZE_PASS_END(RegUsageInfoCollector, "RegUsageInfoCollector",
+INITIALIZE_PASS_END(RegUsageInfoCollectorLegacy, "RegUsageInfoCollector",
                     "Register Usage Information Collector", false, false)
 
 FunctionPass *llvm::createRegUsageInfoCollector() {
-  return new RegUsageInfoCollector();
+  return new RegUsageInfoCollectorLegacy();
 }
 
 // TODO: Move to hook somwehere?
@@ -97,14 +104,32 @@ static bool isCallableFunction(const MachineFunction &MF) {
   }
 }
 
-bool RegUsageInfoCollector::runOnMachineFunction(MachineFunction &MF) {
+PreservedAnalyses
+RegUsageInfoCollectorPass::run(MachineFunction &MF,
+                               MachineFunctionAnalysisManager &MFAM) {
+  Module &MFA = *MF.getFunction().getParent();
+  auto *PRUI = MFAM.getResult<ModuleAnalysisManagerMachineFunctionProxy>(MF)
+                   .getCachedResult<PhysicalRegisterUsageAnalysis>(MFA);
+  assert(PRUI && "PhysicalRegisterUsageAnalysis not available");
+  RegUsageInfoCollector(*PRUI).run(MF);
+  return PreservedAnalyses::all();
+}
+
+bool RegUsageInfoCollectorLegacy::runOnMachineFunction(MachineFunction &MF) {
+  PhysicalRegisterUsageInfo &PRUI =
+      getAnalysis<PhysicalRegisterUsageInfoWrapperLegacy>().getPRUI();
+  return RegUsageInfoCollector(PRUI).run(MF);
+}
+
+bool RegUsageInfoCollector::run(MachineFunction &MF) {
   MachineRegisterInfo *MRI = &MF.getRegInfo();
   const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
   const TargetMachine &TM = MF.getTarget();
 
-  LLVM_DEBUG(dbgs() << " -------------------- " << getPassName()
-                    << " -------------------- \nFunction Name : "
-                    << MF.getName() << '\n');
+  LLVM_DEBUG(
+      dbgs()
+      << " -------------------- Register Usage Information Collector Pass"
+      << " -------------------- \nFunction Name : " << MF.getName() << '\n');
 
   // Analyzing the register usage may be expensive on some targets.
   if (!isCallableFunction(MF)) {
@@ -129,8 +154,6 @@ bool RegUsageInfoCollector::runOnMachineFunction(MachineFunction &MF) {
 
   const Function &F = MF.getFunction();
 
-  PhysicalRegisterUsageInfo &PRUI =
-      getAnalysis<PhysicalRegisterUsageInfoWrapperLegacy>().getPRUI();
   PRUI.setTargetMachine(TM);
 
   LLVM_DEBUG(dbgs() << "Clobbered Registers: ");

llvm/lib/Passes/PassBuilder.cpp

@@ -120,6 +120,7 @@
 #include "llvm/CodeGen/PHIElimination.h"
 #include "llvm/CodeGen/PreISelIntrinsicLowering.h"
 #include "llvm/CodeGen/RegAllocFast.h"
+#include "llvm/CodeGen/RegUsageInfoCollector.h"
 #include "llvm/CodeGen/RegisterUsageInfo.h"
 #include "llvm/CodeGen/SafeStack.h"
 #include "llvm/CodeGen/SelectOptimize.h"

llvm/test/CodeGen/AMDGPU/ipra-regmask.ll

@@ -1,5 +1,10 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -enable-ipra -print-regusage -o /dev/null 2>&1 < %s | FileCheck %s
+
+; RUN: llc -mtriple=amdgcn-amd-amdhsa -stop-after=prologepilog -o - %s \
+; RUN:   | llc -x=mir -mtriple=amdgcn-amd-amdhsa -passes="module(require<reg-usage>,function(machine-function(reg-usage-collector)),print<reg-usage>)" -o /dev/null 2>&1 \
+; RUN:   | FileCheck %s
+
 ; Make sure the expected regmask is generated for sub/superregisters.
 
 ; CHECK-DAG: csr Clobbered Registers: $vgpr0 $vgpr0_hi16 $vgpr0_lo16 $vgpr0_vgpr1 $vgpr0_vgpr1_vgpr2 $vgpr0_vgpr1_vgpr2_vgpr3 $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4 $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5 $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6 $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8 $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9 $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10 $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11 $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 {{$}}

llvm/test/CodeGen/X86/ipra-inline-asm.ll

@@ -1,5 +1,9 @@
 ; RUN: llc -enable-ipra -print-regusage -o /dev/null 2>&1 < %s | FileCheck %s
 
+; RUN: llc --stop-after=prologepilog -o - %s \
+; RUN: | llc -x=mir -enable-ipra -passes="module(require<reg-usage>,function(machine-function(reg-usage-collector)),print<reg-usage>)" -o /dev/null 2>&1 \
+; RUN: | FileCheck %s
+
 target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
 target triple = "x86_64-apple-macosx10.12.0"
 

llvm/test/CodeGen/X86/ipra-reg-usage.ll

@@ -1,5 +1,9 @@
 ; RUN: llc -enable-ipra -print-regusage -o /dev/null 2>&1 < %s | FileCheck %s
 
+; RUN: llc -stop-after=prologepilog -o - %s \
+; RUN: | llc -x=mir -enable-ipra -passes="module(require<reg-usage>,function(machine-function(reg-usage-collector)),print<reg-usage>)" -o /dev/null 2>&1 \
+; RUN: | FileCheck %s
+
 target triple = "x86_64-unknown-unknown"
 declare void @bar1()
 define preserve_allcc void @foo()#0 {