@@ -102,6 +102,54 @@ function(nf_set_linker_file target linker_file_name)
102102
103103endfunction ()
104104
105+ # fixes the ESP32_C3 rom linker script for rom_temp_to_power symbol
106+ # this is required if the CPU it's a revision <= 2
107+ macro (nf_fix_esp32c3_rom_file)
108+
109+ if ((${TARGET_SERIES_SHORT} STREQUAL "esp32c3" ))
110+ # build is for esp32c3
111+
112+ if (${ESP32_REVISION} LESS_EQUAL 2)
113+ # need to UNcomment the rom_temp_to_power symbol
114+ file (READ
115+ ${esp32_idf_SOURCE_DIR} /components/esp_rom/esp32c3/ld/esp32c3.rom.ld
116+ ESP32_C3_ROM_LD_CONTENT)
117+
118+ string (REPLACE
119+ "/* rom_temp_to_power = 0x40001ab4; */"
120+ "rom_temp_to_power = 0x40001ab4;"
121+ ESP32_C3_ROM_LD_NEW_CONTENT
122+ "${ESP32_C3_ROM_LD_CONTENT} " )
123+
124+ file (WRITE
125+ ${esp32_idf_SOURCE_DIR} /components/esp_rom/esp32c3/ld/esp32c3.rom.ld
126+ "${ESP32_C3_ROM_LD_NEW_CONTENT} " )
127+ else ()
128+ # need to COMMENT the rom_temp_to_power symbol
129+ file (READ
130+ ${esp32_idf_SOURCE_DIR} /components/esp_rom/esp32c3/ld/esp32c3.rom.ld
131+ ESP32_C3_ROM_LD_CONTENT)
132+
133+ string (FIND "${ESP32_C3_ROM_LD_CONTENT} " "/* rom_temp_to_power = 0x40001ab4; */" ROM_TEMP_SYMBOL_INDEX)
134+
135+ if (ROM_TEMP_SYMBOL_INDEX EQUAL -1)
136+
137+ string (REPLACE
138+ "rom_temp_to_power = 0x40001ab4;"
139+ "/* rom_temp_to_power = 0x40001ab4; */"
140+ ESP32_C3_ROM_LD_NEW_CONTENT
141+ "${ESP32_C3_ROM_LD_CONTENT} " )
142+
143+ file (WRITE
144+ ${esp32_idf_SOURCE_DIR} /components/esp_rom/esp32c3/ld/esp32c3.rom.ld
145+ "${ESP32_C3_ROM_LD_NEW_CONTENT} " )
146+ endif ()
147+
148+ endif ()
149+
150+ endif ()
151+
152+ endmacro ()
105153
106154# setting compile definitions for a target based on general build options
107155# TARGET parameter to set the target that's setting them for
@@ -135,6 +183,13 @@ function(nf_set_esp32_target_series)
135183 # store the series name for later use
136184 set (TARGET_SERIES_SHORT ${TARGET_SERIES_2} CACHE INTERNAL "ESP32 target series lower case, short version" )
137185
186+ # set the CPU type
187+ if (${TARGET_SERIES_SHORT} STREQUAL "esp32c3" OR ${TARGET_SERIES_SHORT} STREQUAL "esp32h2" )
188+ set (ESP32_CPU_TYPE "riscv" CACHE INTERNAL "Setting CPU type" )
189+ else ()
190+ set (ESP32_CPU_TYPE "xtensa" CACHE INTERNAL "Setting CPU type" )
191+ endif ()
192+
138193endfunction ()
139194
140195# Add packages that are common to ESP32 platform builds
@@ -281,7 +336,7 @@ macro(nf_add_platform_sources target)
281336
282337 # add header files with common OS definitions and board definitions
283338 configure_file (${CMAKE_CURRENT_SOURCE_DIR} /target_common.h.in
284- ${CMAKE_CURRENT_BINARY_DIR} /target_common.h @ONLY)
339+ ${CMAKE_CURRENT_BINARY_DIR} /target_common.h @ONLY)
285340
286341 # sources common to both builds
287342 target_sources (${target} .elf PUBLIC
@@ -415,65 +470,46 @@ macro(nf_setup_partition_tables_generator)
415470 # create command line for partition table generator
416471 set (gen_partition_table "python" "${ESP32_PARTITION_TABLE_UTILITY} " )
417472
418- if (${TARGET_SERIES_SHORT} STREQUAL "esp32" )
419-
420- # partition tables for ESP32
421- add_custom_command ( TARGET ${NANOCLR_PROJECT_NAME} .elf POST_BUILD
422- COMMAND ${gen_partition_table}
423- --flash-size 16MB
424- ${CMAKE_SOURCE_DIR} /targets/ESP32/_IDF/esp32/partitions_nanoclr_16mb.csv
425- ${CMAKE_BINARY_DIR} /partitions_16mb.bin
426- COMMENT "Generate ESP32 partition table for 16MB flash" )
427-
428- add_custom_command ( TARGET ${NANOCLR_PROJECT_NAME} .elf POST_BUILD
429- COMMAND ${gen_partition_table}
430- --flash-size 8MB
431- ${CMAKE_SOURCE_DIR} /targets/ESP32/_IDF/esp32/partitions_nanoclr_8mb.csv
432- ${CMAKE_BINARY_DIR} /partitions_8mb.bin
433- COMMENT "Generate ESP32 partition table for 8MB flash" )
473+ if (${TARGET_SERIES_SHORT} STREQUAL "esp32" OR ${TARGET_SERIES_SHORT} STREQUAL "esp32c3" OR ${TARGET_SERIES_SHORT} STREQUAL "esp32s2" )
434474
435475 add_custom_command ( TARGET ${NANOCLR_PROJECT_NAME} .elf POST_BUILD
436476 COMMAND ${gen_partition_table}
437477 --flash-size 4MB
438- ${CMAKE_SOURCE_DIR} /targets/ESP32/_IDF/esp32 /partitions_nanoclr_4mb.csv
478+ ${CMAKE_SOURCE_DIR} /targets/ESP32/_IDF/${TARGET_SERIES_SHORT} /partitions_nanoclr_4mb.csv
439479 ${CMAKE_BINARY_DIR} /partitions_4mb.bin
440- COMMENT "Generate Esp32 partition table for 4MB flash" )
441-
442- add_custom_command ( TARGET ${NANOCLR_PROJECT_NAME} .elf POST_BUILD
443- COMMAND ${gen_partition_table}
444- --flash-size 2MB
445- ${CMAKE_SOURCE_DIR} /targets/ESP32/_IDF/esp32/partitions_nanoclr_2mb.csv
446- ${CMAKE_BINARY_DIR} /partitions_2mb.bin
447- COMMENT "Generate Esp32 partition table for 2MB flash" )
480+ COMMENT "Generate partition table for 4MB flash" )
448481
449- elseif (${TARGET_SERIES_SHORT} STREQUAL "esp32s2" )
450- # partition tables for ESP32-S2)
482+ endif ()
451483
452-
453- # partition tables for ESP32
454- add_custom_command ( TARGET ${NANOCLR_PROJECT_NAME} .elf POST_BUILD
455- COMMAND ${gen_partition_table}
456- --flash-size 16MB
457- ${CMAKE_SOURCE_DIR} /targets/ESP32/_IDF/esp32/partitions_nanoclr_16mb.csv
458- ${CMAKE_BINARY_DIR} /partitions_16mb.bin
459- COMMENT "Generate ESP32 partition table for 16MB flash" )
484+ if (${TARGET_SERIES_SHORT} STREQUAL "esp32" OR ${TARGET_SERIES_SHORT} STREQUAL "esp32s2" )
460485
461486 add_custom_command ( TARGET ${NANOCLR_PROJECT_NAME} .elf POST_BUILD
462487 COMMAND ${gen_partition_table}
463488 --flash-size 8MB
464- ${CMAKE_SOURCE_DIR} /targets/ESP32/_IDF/esp32 /partitions_nanoclr_8mb.csv
489+ ${CMAKE_SOURCE_DIR} /targets/ESP32/_IDF/${TARGET_SERIES_SHORT} /partitions_nanoclr_8mb.csv
465490 ${CMAKE_BINARY_DIR} /partitions_8mb.bin
466- COMMENT "Generate ESP32 partition table for 8MB flash" )
491+ COMMENT "Generate partition table for 8MB flash" )
467492
468493 add_custom_command ( TARGET ${NANOCLR_PROJECT_NAME} .elf POST_BUILD
469494 COMMAND ${gen_partition_table}
470- --flash-size 4MB
471- ${CMAKE_SOURCE_DIR} /targets/ESP32/_IDF/esp32/partitions_nanoclr_4mb .csv
472- ${CMAKE_BINARY_DIR} /partitions_4mb .bin
473- COMMENT "Generate Esp32 partition table for 4MB flash" )
495+ --flash-size 16MB
496+ ${CMAKE_SOURCE_DIR} /targets/ESP32/_IDF/${TARGET_SERIES_SHORT} /partitions_nanoclr_16mb .csv
497+ ${CMAKE_BINARY_DIR} /partitions_16mb .bin
498+ COMMENT "Generate partition table for 16MB flash" )
474499
475500 endif ()
476501
502+ if (${TARGET_SERIES_SHORT} STREQUAL "esp32" OR ${TARGET_SERIES_SHORT} STREQUAL "esp32c3" )
503+ # 2MB partition table for ESP32
504+
505+ add_custom_command ( TARGET ${NANOCLR_PROJECT_NAME} .elf POST_BUILD
506+ COMMAND ${gen_partition_table}
507+ --flash-size 2MB
508+ ${CMAKE_SOURCE_DIR} /targets/ESP32/_IDF/esp32/partitions_nanoclr_2mb.csv
509+ ${CMAKE_BINARY_DIR} /partitions_2mb.bin
510+ COMMENT "Generate partition table for 2MB flash" )
511+ endif ()
512+
477513endmacro ()
478514
479515# macro to add IDF as a library to the build and add the IDF components according to variant and options
@@ -496,10 +532,6 @@ macro(nf_add_idf_as_library)
496532
497533 message (STATUS "Fixed IDF version. Is now: ${MY_IDF_VER_FIXED} " )
498534
499- # add IDF app_main
500- target_sources (${NANOCLR_PROJECT_NAME} .elf PUBLIC
501- ${CMAKE_SOURCE_DIR} /targets/ESP32/_IDF/${TARGET_SERIES_SHORT} /app_main.c)
502-
503535 # check for SDK config from build options
504536 if (SDK_CONFIG_FILE)
505537 # got an SDK config CONFIG on the build options
@@ -546,7 +578,7 @@ macro(nf_add_idf_as_library)
546578 idf::esptool_py
547579 idf::spiffs
548580 idf::fatfs
549- )
581+ )
550582
551583 if (HAL_USE_BLE_OPTION)
552584 list (APPEND IDF_COMPONENTS_TO_ADD bt)
@@ -662,6 +694,15 @@ macro(nf_add_idf_as_library)
662694 ${SDKCONFIG_DEFAULTS_FILE}
663695 PROJECT_NAME "nanoCLR"
664696 PROJECT_VER ${BUILD_VERSION}
697+ PROJECT_DIR ${CMAKE_SOURCE_DIR}
698+ )
699+
700+ set (CMAKE_EXPORT_COMPILE_COMMANDS ON )
701+
702+ # add IDF app_main
703+ add_executable (
704+ ${NANOCLR_PROJECT_NAME} .elf
705+ ${CMAKE_SOURCE_DIR} /targets/ESP32/_IDF/${TARGET_SERIES_SHORT} /app_main.c
665706 )
666707
667708 #Restore original sdkconfig back to defaults
@@ -775,18 +816,23 @@ macro(nf_add_idf_as_library)
775816 SDKCONFIG_DEFAULT_CONTENTS)
776817
777818 # find out if there is support for PSRAM
778- string (FIND ${SDKCONFIG_DEFAULT_CONTENTS} "CONFIG_ESP32_SPIRAM_SUPPORT=y" CONFIG_ESP32_SPIRAM_SUPPORT_POS)
819+ set (SPIRAM_SUPPORT_PRESENT -1)
820+ if (TARGET_SERIES_SHORT STREQUAL "esp32" OR TARGET_SERIES_SHORT STREQUAL "esp32s2" )
821+ string (FIND ${SDKCONFIG_DEFAULT_CONTENTS} "CONFIG_ESP32_SPIRAM_SUPPORT=y" SPIRAM_SUPPORT_PRESENT)
822+ elseif (TARGET_SERIES_SHORT STREQUAL "esp32s2" )
823+ string (FIND ${SDKCONFIG_DEFAULT_CONTENTS} "CONFIG_ESP32S2_SPIRAM_SUPPORT=y" SPIRAM_SUPPORT_PRESENT)
824+ endif ()
779825
780826 # set variable
781- if (${CONFIG_ESP32_SPIRAM_SUPPORT_POS } GREATER -1)
827+ if (${SPIRAM_SUPPORT_PRESENT } GREATER -1)
782828 set (PSRAM_INFO ", support for PSRAM" )
783829 message (STATUS "Support for PSRAM included" )
784830 else ()
785831 set (PSRAM_INFO ", without support for PSRAM" )
786832 message (STATUS "Support for PSRAM **IS NOT** included" )
787833 endif ()
788834
789- # find out revision info
835+ # find out revision info (ESP32)
790836 string (FIND ${SDKCONFIG_DEFAULT_CONTENTS} "CONFIG_ESP32_REV_MIN_0=y" CONFIG_ESP32_REV_MIN_0_POS)
791837 string (FIND ${SDKCONFIG_DEFAULT_CONTENTS} "CONFIG_ESP32_REV_MIN_3=y" CONFIG_ESP32_REV_MIN_3_POS)
792838
@@ -799,6 +845,29 @@ macro(nf_add_idf_as_library)
799845 message (STATUS "Building for chip revision 3" )
800846 endif ()
801847
848+ # find out revision info (ESP32-C3)
849+ unset (ESP32_REVISION)
850+ string (FIND ${SDKCONFIG_DEFAULT_CONTENTS} "CONFIG_ESP32C3_REV_MIN_2=y" CONFIG_ESP32C3_REV_MIN_2_POS)
851+ string (FIND ${SDKCONFIG_DEFAULT_CONTENTS} "CONFIG_ESP32C3_REV_MIN_3=y" CONFIG_ESP32C3_REV_MIN_3_POS)
852+ string (FIND ${SDKCONFIG_DEFAULT_CONTENTS} "CONFIG_ESP32C3_REV_MIN_4=y" CONFIG_ESP32C3_REV_MIN_4_POS)
853+
854+ # set variable
855+ if (${CONFIG_ESP32C3_REV_MIN_2_POS} GREATER -1)
856+ set (REVISION_INFO ", chip rev. >= 2" )
857+ message (STATUS "Building for chip revision >= 2" )
858+ set (ESP32_REVISION "2" CACHE STRING "ESP32 revision" )
859+ elseif (${CONFIG_ESP32C3_REV_MIN_3_POS} GREATER -1)
860+ set (REVISION_INFO ", chip rev. >= 3" )
861+ message (STATUS "Building for chip revision >= 3" )
862+ set (ESP32_REVISION "3" CACHE STRING "ESP32 revision" )
863+ elseif (${CONFIG_ESP32C3_REV_MIN_4_POS} GREATER -1)
864+ set (REVISION_INFO ", chip rev. 4" )
865+ message (STATUS "Building for chip revision 4" )
866+ set (ESP32_REVISION "4" CACHE STRING "ESP32 revision" )
867+ endif ()
868+
869+ nf_fix_esp32c3_rom_file()
870+
802871 # find out if there is support for BLE
803872 string (FIND ${SDKCONFIG_DEFAULT_CONTENTS} "CONFIG_BT_ENABLED=y" CONFIG_BT_ENABLED_POS)
804873
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