x86: update the loop break when reading topology cpuid leaves 0x1f/0x0b

AMD supports 0x0b but they don't specify the same break condition.
Things worked fine in practice but a new AMD variant is coming,
so don't assume any implicit compatibility with Intel anymore.

Signed-off-by: Brice Goglin <Brice.Goglin@inria.fr>

Author: bgoglin

hwloc/topology-x86.c

@@ -542,7 +542,11 @@ static void read_intel_cores_exttopoenum(struct hwloc_x86_backend_data_s *data,
     ecx = level;
     eax = leaf;
     cpuid_or_from_dump(&eax, &ebx, &ecx, &edx, src_cpuiddump);
-    if (!eax && !ebx)
+    /* Intel specifies that 0x0b/0x1f return 0 in ecx[8:15] and 0 in eax/ebx for invalid subleaves
+     * however AMD only says that 0x0b returns 0 in ebx[0:15].
+     * So use the common condition: 0 in ebx[0:15].
+     */
+    if (!(ebx & 0xffff))
       break;
     apic_packageshift = eax & 0x1f;
   }
@@ -555,7 +559,7 @@ static void read_intel_cores_exttopoenum(struct hwloc_x86_backend_data_s *data,
 	ecx = level;
 	eax = leaf;
 	cpuid_or_from_dump(&eax, &ebx, &ecx, &edx, src_cpuiddump);
-	if (!eax && !ebx)
+	if (!(ebx & 0xffff))
 	  break;
 	apic_nextshift = eax & 0x1f;
 	apic_type = (ecx & 0xff00) >> 8;