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Merge pull request #122 from os-fpga/bug_sim_status
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2 parents 32076a4 + 0480985 commit c41caca

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primitive_parser.py

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -365,6 +365,11 @@ def diff_copy_parse(src_path, dest_path):
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sim_status = False
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print("-------------------------------Simulation Compilation failure----------------------------------")
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if "sim_models" in src_path:
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src = src_path + "../tb"
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dest = dest_path + "../../tb"
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print("Testbench files")
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copy_files(src,dest)
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for prim_name in old_list:
@@ -458,11 +463,6 @@ def diff_copy_parse(src_path, dest_path):
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print("-------------------------------Failure list----------------------------------", sim_fail_list)# if not is_directory_empty(tb_directory):
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if "sim_models" in src_path:
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src = src_path + "../tb"
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dest = dest_path + "../../tb"
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print("Testbench files")
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copy_files(src,dest)
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# if "sim_models_internal" in src_path:
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# src = src_path + "inc"

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