Merge pull request #540 from apeng2012/fix-afio

Fix CAN2 remap

Author: burrbull

CHANGELOG.md

@@ -23,6 +23,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 
 ### Changed
 
+- Fix CAN2 remap
 - `Adc::new` instead of `Adc::adcX` and `AdcExt` trait
 - Update `bxcan`, `heapless`, `mfrc522`, reenable `mpu9250` example [#513]
 - PWM timer auto reload value is now preloaded/buffered [#453]

examples/can-echo.rs

@@ -46,8 +46,12 @@ fn main() -> ! {
 
     #[cfg(feature = "connectivity")]
     let _can2 = {
+        let mut afio = dp.AFIO.constrain(&mut rcc);
         let gpiob = dp.GPIOB.split(&mut rcc);
-        let can = dp.CAN2.can((gpiob.pb6, gpiob.pb5), &mut rcc);
+        let can = dp
+            .CAN2
+            .remap(&mut afio.mapr)
+            .can((gpiob.pb6, gpiob.pb5), &mut rcc);
 
         // APB1 (PCLK1): 8MHz, Bit rate: 125kBit/s, Sample Point 87.5%
         // Value was calculated with http://www.bittiming.can-wiki.info/

examples/serial-dma-circ.rs

@@ -23,7 +23,7 @@ fn main() -> ! {
 
     let mut rcc = p.RCC.constrain();
 
-    //let mut afio = p.AFIO.constrain();
+    //let mut afio = p.AFIO.constrain(&mut rcc);
     let channels = p.DMA1.split(&mut rcc);
 
     let mut gpioa = p.GPIOA.split(&mut rcc);

examples/serial-dma-peek.rs

@@ -22,7 +22,7 @@ fn main() -> ! {
 
     let mut rcc = p.RCC.constrain();
 
-    //let mut afio = p.AFIO.constrain();
+    //let mut afio = p.AFIO.constrain(&mut rcc);
     let channels = p.DMA1.split(&mut rcc);
 
     let mut gpioa = p.GPIOA.split(&mut rcc);

examples/serial-fmt.rs

@@ -27,7 +27,7 @@ fn main() -> ! {
     let mut rcc = p.RCC.constrain();
 
     // Prepare the alternate function I/O registers
-    //let mut afio = p.AFIO.constrain();
+    //let mut afio = p.AFIO.constrain(&mut rcc);
 
     // Prepare the GPIOB peripheral
     let mut gpiob = p.GPIOB.split(&mut rcc);

examples/serial_9bits.rs

@@ -102,7 +102,7 @@ fn main() -> ! {
     let mut rcc = p.RCC.constrain();
 
     // Prepare the alternate function I/O registers.
-    //let mut afio = p.AFIO.constrain();
+    //let mut afio = p.AFIO.constrain(&mut rcc);
 
     // Prepare the GPIOB peripheral.
     let gpiob = p.GPIOB.split(&mut rcc);

examples/serial_config.rs

@@ -24,7 +24,7 @@ fn main() -> ! {
     let mut rcc = p.RCC.constrain();
 
     // Prepare the alternate function I/O registers
-    //let mut afio = p.AFIO.constrain();
+    //let mut afio = p.AFIO.constrain(&mut rcc);
 
     // Prepare the GPIOB peripheral
     let mut gpiob = p.GPIOB.split(&mut rcc);

examples/serial_reconfigure.rs

@@ -28,7 +28,7 @@ fn main() -> ! {
     let mut rcc = p.RCC.constrain();
 
     // Prepare the alternate function I/O registers
-    //let mut afio = p.AFIO.constrain();
+    //let mut afio = p.AFIO.constrain(&mut rcc);
 
     // Prepare the GPIOB peripheral
     let mut gpiob = p.GPIOB.split(&mut rcc);

examples/spi.rs

@@ -23,7 +23,7 @@ fn setup() -> (Spi<SPI1, u8>, PA4<Output>) {
 
     let mut rcc = dp.RCC.constrain();
 
-    //let mut afio = dp.AFIO.constrain();
+    //let mut afio = dp.AFIO.constrain(&mut rcc);
     let mut gpioa = dp.GPIOA.split(&mut rcc);
 
     // SPI1

src/afio.rs

@@ -35,7 +35,7 @@ impl AfioExt for AFIO {
 /// ```rust
 /// let p = pac::Peripherals::take().unwrap();
 /// let mut rcc = p.RCC.constrain();
-/// let mut afio = p.AFIO.constrain();
+/// let mut afio = p.AFIO.constrain(&mut rcc);
 pub struct Parts {
     pub evcr: EVCR,
     pub mapr: MAPR,
@@ -62,7 +62,7 @@ impl EVCR {
 /// ```rust
 /// let dp = pac::Peripherals::take().unwrap();
 /// let mut rcc = dp.RCC.constrain();
-/// let mut afio = dp.AFIO.constrain();
+/// let mut afio = dp.AFIO.constrain(&mut rcc);
 /// function_using_mapr(&mut afio.mapr);
 /// ```
 #[non_exhaustive]
@@ -318,14 +318,14 @@ pub mod can2 {
 
     pin! {
         <Tx, Alternate<PushPull>> for [
-            PB6:  [0],
-            PB13: [1],
+            PB13: [0],
+            PB6:  [1],
         ],
     }
     pin! {
         <Rx, Input> default:Floating for [
-            PB5:  [0],
-            PB12: [1],
+            PB12: [0],
+            PB5:  [1],
         ],
     }