Add syscfg driver to enforce clock enable

Author: Disasm

src/gpio.rs

@@ -2,7 +2,8 @@
 
 use core::marker::PhantomData;
 
-use crate::pac::{EXTI, SYSCFG};
+use crate::pac::EXTI;
+use crate::syscfg::SysCfg;
 
 /// Extension trait to split a GPIO peripheral in independent pins and registers
 pub trait GpioExt {
@@ -85,7 +86,7 @@ pub enum Edge {
 
 /// External Interrupt Pin
 pub trait ExtiPin {
-    fn make_interrupt_source(&mut self, syscfg: &mut SYSCFG);
+    fn make_interrupt_source(&mut self, syscfg: &mut SysCfg);
     fn trigger_on_edge(&mut self, exti: &mut EXTI, level: Edge);
     fn enable_interrupt(&mut self, exti: &mut EXTI);
     fn disable_interrupt(&mut self, exti: &mut EXTI);
@@ -97,7 +98,7 @@ macro_rules! exti_erased {
     ($PIN:ty, $extigpionr:expr) => {
         impl<MODE> ExtiPin for $PIN {
             /// Make corresponding EXTI line sensitive to this pin
-            fn make_interrupt_source(&mut self, syscfg: &mut SYSCFG) {
+            fn make_interrupt_source(&mut self, syscfg: &mut SysCfg) {
                 let offset = 4 * (self.i % 4);
                 match self.i {
                     0..=3 => {
@@ -177,7 +178,7 @@ macro_rules! exti {
     ($PIN:ty, $extigpionr:expr, $i:expr, $exticri:ident) => {
         impl<MODE> ExtiPin for $PIN {
             /// Configure EXTI Line $i to trigger from this pin.
-            fn make_interrupt_source(&mut self, syscfg: &mut SYSCFG) {
+            fn make_interrupt_source(&mut self, syscfg: &mut SysCfg) {
                 let offset = 4 * ($i % 4);
                 syscfg.$exticri.modify(|r, w| unsafe {
                     let mut exticr = r.bits();
@@ -247,7 +248,7 @@ macro_rules! gpio {
             use embedded_hal::digital::v2::{InputPin, OutputPin, StatefulOutputPin, toggleable};
             use crate::pac::$GPIOX;
 
-            use crate::{pac::{RCC, EXTI, SYSCFG}, bb};
+            use crate::{pac::{RCC, EXTI}, bb, syscfg::SysCfg};
             use super::{
                 Alternate, AlternateOD, Floating, GpioExt, Input, OpenDrain, Output, Speed,
                 PullDown, PullUp, PushPull, AF0, AF1, AF2, AF3, AF4, AF5, AF6, AF7, AF8, AF9, AF10,

src/lib.rs

@@ -178,6 +178,8 @@ pub mod signature;
 #[cfg(feature = "device-selected")]
 pub mod spi;
 #[cfg(feature = "device-selected")]
+pub mod syscfg;
+#[cfg(feature = "device-selected")]
 pub mod time;
 #[cfg(feature = "device-selected")]
 pub mod timer;

src/prelude.rs

@@ -22,4 +22,5 @@ pub use crate::rcc::RccExt as _stm32f4xx_hal_rcc_RccExt;
     ))
 ))]
 pub use crate::rng::RngExt as _stm32f4xx_hal_rng_RngExt;
+pub use crate::syscfg::SysCfgExt as _stm32f4xx_hal_syscfg_SysCfgExt;
 pub use crate::time::U32Ext as _stm32f4xx_hal_time_U32Ext;

src/syscfg.rs

@@ -0,0 +1,34 @@
+use crate::stm32::{SYSCFG, RCC};
+use core::ops::Deref;
+use crate::bb;
+
+/// Extension trait that constrains the `SYSCFG` peripheral
+pub trait SysCfgExt {
+    /// Constrains the `SYSCFG` peripheral so it plays nicely with the other abstractions
+    fn constrain(self) -> SysCfg;
+}
+
+impl SysCfgExt for SYSCFG {
+    fn constrain(self) -> SysCfg {
+        unsafe {
+            // NOTE(unsafe) this reference will only be used for atomic writes with no side effects.
+            let rcc = &(*RCC::ptr());
+
+            // Enable clock.
+            bb::set(&rcc.apb2enr, 14);
+        }
+
+        SysCfg(self)
+    }
+}
+
+pub struct SysCfg(SYSCFG);
+
+impl Deref for SysCfg {
+    type Target = SYSCFG;
+
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}