Merge pull request #772 from stm32-rs/spi-address

burrbull · web-flow · commit bd60a4494337 · 2024-07-28T11:30:38.000+03:00
I2C 10-bit address support
diff --git a/CHANGELOG.md b/CHANGELOG.md
@@ -9,6 +9,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 
 ### Added
 
+ - I2C 10-bit address support for I2c
  - `i2c_scanner` example [#758]
  - Enable `sdio` for stm32f446
  - port LTDC implementation and example from stm32f7xx-hal [#731]
diff --git a/src/i2c.rs b/src/i2c.rs
@@ -8,9 +8,13 @@ use crate::gpio;
 use crate::rcc::Clocks;
 use fugit::{HertzU32 as Hertz, RateExtU32};
 
+mod common;
 mod hal_02;
 mod hal_1;
 
+pub use common::{Address, Error, NoAcknowledgeSource};
+use common::{Hal02Operation, Hal1Operation};
+
 pub mod dma;
 
 #[derive(Debug, Eq, PartialEq)]
@@ -70,39 +74,6 @@ pub struct I2c<I2C: Instance> {
     pins: (I2C::Scl, I2C::Sda),
 }
 
-pub use embedded_hal::i2c::NoAcknowledgeSource;
-
-#[derive(Debug, Eq, PartialEq, Copy, Clone)]
-#[non_exhaustive]
-pub enum Error {
-    Overrun,
-    NoAcknowledge(NoAcknowledgeSource),
-    Timeout,
-    // Note: The Bus error type is not currently returned, but is maintained for compatibility.
-    Bus,
-    Crc,
-    ArbitrationLoss,
-}
-
-impl Error {
-    pub(crate) fn nack_addr(self) -> Self {
-        match self {
-            Error::NoAcknowledge(NoAcknowledgeSource::Unknown) => {
-                Error::NoAcknowledge(NoAcknowledgeSource::Address)
-            }
-            e => e,
-        }
-    }
-    pub(crate) fn nack_data(self) -> Self {
-        match self {
-            Error::NoAcknowledge(NoAcknowledgeSource::Unknown) => {
-                Error::NoAcknowledge(NoAcknowledgeSource::Data)
-            }
-            e => e,
-        }
-    }
-}
-
 pub trait Instance:
     crate::Sealed
     + crate::Ptr<RB = i2c1::RegisterBlock>
@@ -155,10 +126,7 @@ impl<I2C: Instance> I2cExt for I2C {
     }
 }
 
-impl<I2C> I2c<I2C>
-where
-    I2C: Instance,
-{
+impl<I2C: Instance> I2c<I2C> {
     pub fn new(
         i2c: I2C,
         pins: (impl Into<I2C::Scl>, impl Into<I2C::Sda>),
@@ -287,7 +255,7 @@ impl<I2C: Instance> I2c<I2C> {
 
     /// Sends START and Address for writing
     #[inline(always)]
-    fn prepare_write(&self, addr: u8) -> Result<(), Error> {
+    fn prepare_write(&self, addr: Address) -> Result<(), Error> {
         // Wait until a previous STOP condition finishes. When the previous
         // STOP was generated inside an ISR (e.g. DMA interrupt handler),
         // the ISR returns without waiting for the STOP condition to finish.
@@ -313,9 +281,20 @@ impl<I2C: Instance> I2c<I2C> {
         }
 
         // Set up current address, we're trying to talk to
-        self.i2c
-            .dr()
-            .write(|w| unsafe { w.bits(u32::from(addr) << 1) });
+        match addr {
+            Address::Seven(addr) => {
+                self.i2c
+                    .dr()
+                    .write(|w| unsafe { w.bits(u32::from(addr) << 1) });
+            }
+            Address::Ten(addr) => {
+                let [msbs, lsbs] = addr.to_be_bytes();
+                let msbs = ((msbs & 0b11) << 1) & 0b11110000;
+                let dr = self.i2c.dr();
+                dr.write(|w| unsafe { w.bits(u32::from(msbs)) });
+                dr.write(|w| unsafe { w.bits(u32::from(lsbs)) });
+            }
+        }
 
         // Wait until address was sent
         loop {
@@ -337,7 +316,7 @@ impl<I2C: Instance> I2c<I2C> {
     }
 
     /// Sends START and Address for reading
-    fn prepare_read(&self, addr: u8) -> Result<(), Error> {
+    fn prepare_read(&self, addr: Address, first_transaction: bool) -> Result<(), Error> {
         // Wait until a previous STOP condition finishes. When the previous
         // STOP was generated inside an ISR (e.g. DMA interrupt handler),
         // the ISR returns without waiting for the STOP condition to finish.
@@ -361,9 +340,26 @@ impl<I2C: Instance> I2c<I2C> {
         } {}
 
         // Set up current address, we're trying to talk to
-        self.i2c
-            .dr()
-            .write(|w| unsafe { w.bits((u32::from(addr) << 1) + 1) });
+        match addr {
+            Address::Seven(addr) => {
+                self.i2c
+                    .dr()
+                    .write(|w| unsafe { w.bits((u32::from(addr) << 1) & 1) });
+            }
+            Address::Ten(addr) => {
+                let [msbs, lsbs] = addr.to_be_bytes();
+                let msbs = ((msbs & 0b11) << 1) & 0b11110000;
+                let dr = self.i2c.dr();
+                if first_transaction {
+                    dr.write(|w| unsafe { w.bits(u32::from(msbs)) });
+                    dr.write(|w| unsafe { w.bits(u32::from(lsbs)) });
+                }
+                self.i2c.cr1().modify(|_, w| w.start().set_bit());
+                // Wait until START condition was generated
+                while self.i2c.sr1().read().sb().bit_is_clear() {}
+                dr.write(|w| unsafe { w.bits(u32::from(msbs & 1)) });
+            }
+        }
 
         // Wait until address was sent
         loop {
@@ -439,12 +435,22 @@ impl<I2C: Instance> I2c<I2C> {
         Ok(())
     }
 
-    pub fn read(&mut self, addr: u8, buffer: &mut [u8]) -> Result<(), Error> {
+    pub fn read(&mut self, addr: impl Into<Address>, buffer: &mut [u8]) -> Result<(), Error> {
+        self.read_inner(addr.into(), buffer, true)
+    }
+
+    #[inline(always)]
+    fn read_inner(
+        &mut self,
+        addr: Address,
+        buffer: &mut [u8],
+        first_transaction: bool,
+    ) -> Result<(), Error> {
         if buffer.is_empty() {
             return Err(Error::Overrun);
         }
 
-        self.prepare_read(addr)?;
+        self.prepare_read(addr.into(), first_transaction)?;
         self.read_wo_prepare(buffer)
     }
 
@@ -476,8 +482,8 @@ impl<I2C: Instance> I2c<I2C> {
         }
     }
 
-    pub fn write(&mut self, addr: u8, bytes: &[u8]) -> Result<(), Error> {
-        self.prepare_write(addr)?;
+    pub fn write(&mut self, addr: impl Into<Address>, bytes: &[u8]) -> Result<(), Error> {
+        self.prepare_write(addr.into())?;
         self.write_wo_prepare(bytes)
     }
 
@@ -499,11 +505,11 @@ impl<I2C: Instance> I2c<I2C> {
         Ok(())
     }
 
-    pub fn write_iter<B>(&mut self, addr: u8, bytes: B) -> Result<(), Error>
+    pub fn write_iter<B>(&mut self, addr: impl Into<Address>, bytes: B) -> Result<(), Error>
     where
         B: IntoIterator<Item = u8>,
     {
-        self.prepare_write(addr)?;
+        self.prepare_write(addr.into())?;
         self.write_bytes(bytes.into_iter())?;
 
         // Send a STOP condition
@@ -520,30 +526,43 @@ impl<I2C: Instance> I2c<I2C> {
         Ok(())
     }
 
-    pub fn write_read(&mut self, addr: u8, bytes: &[u8], buffer: &mut [u8]) -> Result<(), Error> {
+    pub fn write_read(
+        &mut self,
+        addr: impl Into<Address>,
+        bytes: &[u8],
+        buffer: &mut [u8],
+    ) -> Result<(), Error> {
+        let addr = addr.into();
         self.prepare_write(addr)?;
         self.write_bytes(bytes.iter().cloned())?;
-        self.read(addr, buffer)
+        self.read_inner(addr, buffer, false)
     }
 
-    pub fn write_iter_read<B>(&mut self, addr: u8, bytes: B, buffer: &mut [u8]) -> Result<(), Error>
+    pub fn write_iter_read<B>(
+        &mut self,
+        addr: impl Into<Address>,
+        bytes: B,
+        buffer: &mut [u8],
+    ) -> Result<(), Error>
     where
         B: IntoIterator<Item = u8>,
     {
+        let addr = addr.into();
         self.prepare_write(addr)?;
         self.write_bytes(bytes.into_iter())?;
-        self.read(addr, buffer)
+        self.read_inner(addr, buffer, false)
     }
 
     pub fn transaction<'a>(
         &mut self,
-        addr: u8,
+        addr: impl Into<Address>,
         mut ops: impl Iterator<Item = Hal1Operation<'a>>,
     ) -> Result<(), Error> {
+        let addr = addr.into();
         if let Some(mut prev_op) = ops.next() {
             // 1. Generate Start for operation
             match &prev_op {
-                Hal1Operation::Read(_) => self.prepare_read(addr)?,
+                Hal1Operation::Read(_) => self.prepare_read(addr, true)?,
                 Hal1Operation::Write(_) => self.prepare_write(addr)?,
             };
 
@@ -558,7 +577,9 @@ impl<I2C: Instance> I2c<I2C> {
                     (Hal1Operation::Read(_), Hal1Operation::Write(_)) => {
                         self.prepare_write(addr)?
                     }
-                    (Hal1Operation::Write(_), Hal1Operation::Read(_)) => self.prepare_read(addr)?,
+                    (Hal1Operation::Write(_), Hal1Operation::Read(_)) => {
+                        self.prepare_read(addr, false)?
+                    }
                     _ => {} // No changes if operation have not changed
                 }
 
@@ -578,19 +599,21 @@ impl<I2C: Instance> I2c<I2C> {
 
     pub fn transaction_slice(
         &mut self,
-        addr: u8,
+        addr: impl Into<Address>,
         ops_slice: &mut [Hal1Operation<'_>],
     ) -> Result<(), Error> {
+        let addr = addr.into();
         transaction_impl!(self, addr, ops_slice, Hal1Operation);
         // Fallthrough is success
         Ok(())
     }
 
     fn transaction_slice_hal_02(
         &mut self,
-        addr: u8,
+        addr: impl Into<Address>,
         ops_slice: &mut [Hal02Operation<'_>],
     ) -> Result<(), Error> {
+        let addr = addr.into();
         transaction_impl!(self, addr, ops_slice, Hal02Operation);
         // Fallthrough is success
         Ok(())
@@ -606,7 +629,7 @@ macro_rules! transaction_impl {
         if let Some(mut prev_op) = ops.next() {
             // 1. Generate Start for operation
             match &prev_op {
-                $Operation::Read(_) => i2c.prepare_read(addr)?,
+                $Operation::Read(_) => i2c.prepare_read(addr, true)?,
                 $Operation::Write(_) => i2c.prepare_write(addr)?,
             };
 
@@ -619,7 +642,7 @@ macro_rules! transaction_impl {
                 // 3. If operation changes type we must generate new start
                 match (&prev_op, &op) {
                     ($Operation::Read(_), $Operation::Write(_)) => i2c.prepare_write(addr)?,
-                    ($Operation::Write(_), $Operation::Read(_)) => i2c.prepare_read(addr)?,
+                    ($Operation::Write(_), $Operation::Read(_)) => i2c.prepare_read(addr, false)?,
                     _ => {} // No changes if operation have not changed
                 }
 
@@ -635,6 +658,3 @@ macro_rules! transaction_impl {
     };
 }
 use transaction_impl;
-
-type Hal1Operation<'a> = embedded_hal::i2c::Operation<'a>;
-type Hal02Operation<'a> = embedded_hal_02::blocking::i2c::Operation<'a>;
diff --git a/src/i2c/common.rs b/src/i2c/common.rs
@@ -0,0 +1,66 @@
+#[derive(Clone, Copy, Debug, Eq, PartialEq)]
+pub enum Address {
+    Seven(u8),
+    Ten(u16),
+}
+
+impl From<u8> for Address {
+    fn from(value: u8) -> Self {
+        Self::Seven(value)
+    }
+}
+
+impl From<u16> for Address {
+    fn from(value: u16) -> Self {
+        Self::Ten(value)
+    }
+}
+
+pub use embedded_hal::i2c::NoAcknowledgeSource;
+
+#[derive(Debug, Eq, PartialEq, Copy, Clone)]
+#[non_exhaustive]
+pub enum Error {
+    Overrun,
+    NoAcknowledge(NoAcknowledgeSource),
+    Timeout,
+    // Note: The Bus error type is not currently returned, but is maintained for compatibility.
+    Bus,
+    Crc,
+    ArbitrationLoss,
+}
+
+impl Error {
+    pub(crate) fn nack_addr(self) -> Self {
+        match self {
+            Error::NoAcknowledge(NoAcknowledgeSource::Unknown) => {
+                Error::NoAcknowledge(NoAcknowledgeSource::Address)
+            }
+            e => e,
+        }
+    }
+    pub(crate) fn nack_data(self) -> Self {
+        match self {
+            Error::NoAcknowledge(NoAcknowledgeSource::Unknown) => {
+                Error::NoAcknowledge(NoAcknowledgeSource::Data)
+            }
+            e => e,
+        }
+    }
+}
+
+use embedded_hal::i2c::ErrorKind;
+impl embedded_hal::i2c::Error for Error {
+    fn kind(&self) -> ErrorKind {
+        match *self {
+            Self::Overrun => ErrorKind::Overrun,
+            Self::Bus => ErrorKind::Bus,
+            Self::ArbitrationLoss => ErrorKind::ArbitrationLoss,
+            Self::NoAcknowledge(nack) => ErrorKind::NoAcknowledge(nack),
+            Self::Crc | Self::Timeout => ErrorKind::Other,
+        }
+    }
+}
+
+pub(crate) type Hal1Operation<'a> = embedded_hal::i2c::Operation<'a>;
+pub(crate) type Hal02Operation<'a> = embedded_hal_02::blocking::i2c::Operation<'a>;
diff --git a/src/i2c/hal_1.rs b/src/i2c/hal_1.rs
@@ -1,18 +1,4 @@
-use embedded_hal::i2c::{Error, ErrorKind, ErrorType};
-
-impl Error for super::Error {
-    fn kind(&self) -> ErrorKind {
-        match *self {
-            Self::Overrun => ErrorKind::Overrun,
-            Self::Bus => ErrorKind::Bus,
-            Self::ArbitrationLoss => ErrorKind::ArbitrationLoss,
-            Self::NoAcknowledge(nack) => ErrorKind::NoAcknowledge(nack),
-            Self::Crc | Self::Timeout => ErrorKind::Other,
-        }
-    }
-}
-
-impl<I2C: super::Instance> ErrorType for super::I2c<I2C> {
+impl<I2C: super::Instance> embedded_hal::i2c::ErrorType for super::I2c<I2C> {
     type Error = super::Error;
 }
 
