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jurahulvinay-deshmukh
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[NFC][TableGen] Adopt CodeGenHelpers in InstrInfoEmitter (llvm#166442)
Adopt `IfDefEmitter` and `NamespaceEmitter` in InstrInfoEmitter
1 parent a09818a commit b8ede38

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3 files changed

+550
-572
lines changed

3 files changed

+550
-572
lines changed

llvm/test/TableGen/RegClassByHwMode.td

Lines changed: 8 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -6,18 +6,21 @@
66

77
include "llvm/Target/Target.td"
88

9-
// INSTRINFO: #ifdef GET_INSTRINFO_ENUM
9+
// INSTRINFO: #ifdef GET_INSTRINFO_ENUM
1010
// INSTRINFO-NEXT: #undef GET_INSTRINFO_ENUM
11+
// INSTRINFO-EMPTY:
1112
// INSTRINFO-NEXT: namespace llvm::MyTarget {
13+
// INSTRINFO-EMPTY:
1214
// INSTRINFO-NEXT: enum {
13-
// INSTRINFO-NEXT: PHI
14-
// INSTRINFO: };
15-
// INSTRINFO: enum RegClassByHwModeUses : uint16_t {
15+
// INSTRINFO-NEXT: PHI
16+
// INSTRINFO: };
17+
// INSTRINFO: enum RegClassByHwModeUses : uint16_t {
1618
// INSTRINFO-NEXT: MyPtrRC,
1719
// INSTRINFO-NEXT: XRegs_EvenIfRequired,
1820
// INSTRINFO-NEXT: YRegs_EvenIfRequired,
1921
// INSTRINFO-NEXT: };
20-
// INSTRINFO-NEXT: }
22+
// INSTRINFO-EMPTY:
23+
// INSTRINFO-NEXT: } // namespace llvm::MyTarget
2124

2225
// INSTRINFO: { MyTarget::XRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
2326
// INSTRINFO: { MyTarget::XRegs_EvenRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },

llvm/test/TableGen/get-named-operand-idx.td

Lines changed: 12 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -50,7 +50,9 @@ def InstD : InstBase {
5050

5151
// CHECK-LABEL: #ifdef GET_INSTRINFO_OPERAND_ENUM
5252
// CHECK-NEXT: #undef GET_INSTRINFO_OPERAND_ENUM
53+
// CHECK-EMPTY:
5354
// CHECK-NEXT: namespace llvm::MyNamespace {
55+
// CHECK-EMPTY:
5456
// CHECK-NEXT: enum class OpName : uint8_t {
5557
// CHECK-NEXT: a = 0,
5658
// CHECK-NEXT: b = 1,
@@ -62,12 +64,16 @@ def InstD : InstBase {
6264
// CHECK-EMPTY:
6365
// CHECK-NEXT: LLVM_READONLY int16_t getNamedOperandIdx(uint16_t Opcode, OpName Name);
6466
// CHECK-NEXT: LLVM_READONLY OpName getOperandIdxName(uint16_t Opcode, int16_t Idx);
65-
// CHECK-NEXT: } // end namespace llvm::MyNamespace
66-
// CHECK-NEXT: #endif //GET_INSTRINFO_OPERAND_ENUM
67+
// CHECK-EMPTY:
68+
// CHECK-NEXT: } // namespace llvm::MyNamespace
69+
// CHECK-EMPTY:
70+
// CHECK-NEXT: #endif // GET_INSTRINFO_OPERAND_ENUM
6771

6872
// CHECK-LABEL: #ifdef GET_INSTRINFO_NAMED_OPS
6973
// CHECK-NEXT: #undef GET_INSTRINFO_NAMED_OPS
74+
// CHECK-EMPTY:
7075
// CHECK-NEXT: namespace llvm::MyNamespace {
76+
// CHECK-EMPTY:
7177
// CHECK-NEXT: LLVM_READONLY static uint8_t getInstructionIndexForOpLookup(uint16_t Opcode) {
7278
// CHECK-NEXT: static constexpr uint8_t InstructionIndex[] = {
7379
// CHECK-NEXT: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
@@ -113,5 +119,7 @@ def InstD : InstBase {
113119
// CHECK-NEXT: unsigned InstrIdx = getInstructionIndexForOpLookup(Opcode);
114120
// CHECK-NEXT: return OperandMap[InstrIdx][(unsigned)Idx];
115121
// CHECK-NEXT: }
116-
// CHECK-NEXT: } // end namespace llvm::MyNamespace
117-
// CHECK-NEXT: #endif //GET_INSTRINFO_NAMED_OPS
122+
// CHECK-EMPTY:
123+
// CHECK-NEXT: } // namespace llvm::MyNamespace
124+
// CHECK-EMPTY:
125+
// CHECK-NEXT: #endif // GET_INSTRINFO_NAMED_OPS

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