Remove local changes to AttributorAttributes.cpp

llvm/lib/Transforms/IPO/AttributorAttributes.cpp

@@ -10686,24 +10686,14 @@ struct AACallEdgesCallSite : public AACallEdgesImpl {
       }
       return Change;
     }
-#ifndef  AAIndirectCallInfo_nolonger_breaks_snap_miteams
-    // Process callee metadata if available.
-    if (auto *MD = getCtxI()->getMetadata(LLVMContext::MD_callees)) {
-      for (const auto &Op : MD->operands()) {
-        Function *Callee = mdconst::dyn_extract_or_null<Function>(Op);
-        if (Callee)
-          addCalledFunction(Callee, Change);
-      }
-      return Change;
-    }
-#else
+
     if (CB->isIndirectCall())
       if (auto *IndirectCallAA = A.getAAFor<AAIndirectCallInfo>(
               *this, getIRPosition(), DepClassTy::OPTIONAL))
         if (IndirectCallAA->foreachCallee(
                 [&](Function *Fn) { return VisitValue(*Fn, CB); }))
           return Change;
-#endif
+
     // The most simple case.
     ProcessCalledOperand(CB->getCalledOperand(), CB);
 

llvm/test/CodeGen/AMDGPU/simple-indirect-call-2.ll

@@ -53,14 +53,32 @@ entry:
 }
 
 define amdgpu_kernel void @foo(ptr noundef %fp) {
-; CHECK-LABEL: define {{[^@]+}}@foo
-; CHECK-SAME: (ptr noundef [[FP:%.*]]) #[[ATTR1:[0-9]+]] {
-; CHECK-NEXT:  entry:
-; CHECK-NEXT:    [[FP_ADDR:%.*]] = alloca ptr, align 8, addrspace(5)
-; CHECK-NEXT:    store ptr [[FP]], ptr addrspace(5) [[FP_ADDR]], align 8
-; CHECK-NEXT:    [[LOAD:%.*]] = load ptr, ptr addrspace(5) [[FP_ADDR]], align 8
-; CHECK-NEXT:    call void [[LOAD]]()
-; CHECK-NEXT:    ret void
+; OW-LABEL: define {{[^@]+}}@foo
+; OW-SAME: (ptr noundef [[FP:%.*]]) #[[ATTR1:[0-9]+]] {
+; OW-NEXT:  entry:
+; OW-NEXT:    [[FP_ADDR:%.*]] = alloca ptr, align 8, addrspace(5)
+; OW-NEXT:    store ptr [[FP]], ptr addrspace(5) [[FP_ADDR]], align 8
+; OW-NEXT:    [[LOAD:%.*]] = load ptr, ptr addrspace(5) [[FP_ADDR]], align 8
+; OW-NEXT:    call void [[LOAD]]()
+; OW-NEXT:    ret void
+;
+; CW-LABEL: define {{[^@]+}}@foo
+; CW-SAME: (ptr noundef [[FP:%.*]]) #[[ATTR0]] {
+; CW-NEXT:  entry:
+; CW-NEXT:    [[FP_ADDR:%.*]] = alloca ptr, align 8, addrspace(5)
+; CW-NEXT:    store ptr [[FP]], ptr addrspace(5) [[FP_ADDR]], align 8
+; CW-NEXT:    [[LOAD:%.*]] = load ptr, ptr addrspace(5) [[FP_ADDR]], align 8
+; CW-NEXT:    call void [[LOAD]](), !callees [[META0:![0-9]+]]
+; CW-NEXT:    ret void
+;
+; NO-LABEL: define {{[^@]+}}@foo
+; NO-SAME: (ptr noundef [[FP:%.*]]) #[[ATTR0]] {
+; NO-NEXT:  entry:
+; NO-NEXT:    [[FP_ADDR:%.*]] = alloca ptr, align 8, addrspace(5)
+; NO-NEXT:    store ptr [[FP]], ptr addrspace(5) [[FP_ADDR]], align 8
+; NO-NEXT:    [[LOAD:%.*]] = load ptr, ptr addrspace(5) [[FP_ADDR]], align 8
+; NO-NEXT:    call void [[LOAD]](), !callees [[META0:![0-9]+]]
+; NO-NEXT:    ret void
 ;
 entry:
   %fp.addr = alloca ptr, addrspace(5)
@@ -71,10 +89,14 @@ entry:
 }
 
 ;.
-; CHECK: attributes #[[ATTR0]] = { "amdgpu-no-cluster-id-x" "amdgpu-no-cluster-id-y" "amdgpu-no-cluster-id-z" "amdgpu-no-completion-action" "amdgpu-no-default-queue" "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-flat-scratch-init" "amdgpu-no-heap-ptr" "amdgpu-no-hostcall-ptr" "amdgpu-no-implicitarg-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-multigrid-sync-arg" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "uniform-work-group-size"="false" }
-; CHECK: attributes #[[ATTR1]] = { "uniform-work-group-size"="false" }
+; CW: attributes #[[ATTR0]] = { "amdgpu-no-cluster-id-x" "amdgpu-no-cluster-id-y" "amdgpu-no-cluster-id-z" "amdgpu-no-completion-action" "amdgpu-no-default-queue" "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-flat-scratch-init" "amdgpu-no-heap-ptr" "amdgpu-no-hostcall-ptr" "amdgpu-no-implicitarg-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-multigrid-sync-arg" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "uniform-work-group-size"="false" }
+;.
+; NO: attributes #[[ATTR0]] = { "amdgpu-no-cluster-id-x" "amdgpu-no-cluster-id-y" "amdgpu-no-cluster-id-z" "amdgpu-no-completion-action" "amdgpu-no-default-queue" "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-flat-scratch-init" "amdgpu-no-heap-ptr" "amdgpu-no-hostcall-ptr" "amdgpu-no-implicitarg-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-multigrid-sync-arg" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "uniform-work-group-size"="false" }
+;.
+; OW: attributes #[[ATTR0]] = { "amdgpu-no-cluster-id-x" "amdgpu-no-cluster-id-y" "amdgpu-no-cluster-id-z" "amdgpu-no-completion-action" "amdgpu-no-default-queue" "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-flat-scratch-init" "amdgpu-no-heap-ptr" "amdgpu-no-hostcall-ptr" "amdgpu-no-implicitarg-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-multigrid-sync-arg" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "uniform-work-group-size"="false" }
+; OW: attributes #[[ATTR1]] = { "uniform-work-group-size"="false" }
+;.
+; CW: [[META0]] = !{ptr @bar1, ptr @bar2}
+;.
+; NO: [[META0]] = !{ptr @bar1, ptr @bar2}
 ;.
-;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
-; CW: {{.*}}
-; NO: {{.*}}
-; OW: {{.*}}

llvm/test/Transforms/Attributor/callgraph.ll

@@ -576,9 +576,20 @@ define void @func7(ptr %unknown) {
 
 ; Check there's no crash if something that isn't a function appears in !callees
 define void @undef_in_callees() {
-; CHECK-LABEL: @undef_in_callees(
-; CHECK-NEXT:  cond.end.i:
-; CHECK-NEXT:    unreachable
+; UNLIM-LABEL: @undef_in_callees(
+; UNLIM-NEXT:  cond.end.i:
+; UNLIM-NEXT:    call void undef(ptr undef, i32 undef, ptr undef), !callees [[META2:![0-9]+]]
+; UNLIM-NEXT:    ret void
+;
+; LIMI2-LABEL: @undef_in_callees(
+; LIMI2-NEXT:  cond.end.i:
+; LIMI2-NEXT:    call void undef(ptr undef, i32 undef, ptr undef), !callees [[META4:![0-9]+]]
+; LIMI2-NEXT:    ret void
+;
+; LIMI0-LABEL: @undef_in_callees(
+; LIMI0-NEXT:  cond.end.i:
+; LIMI0-NEXT:    call void undef(ptr undef, i32 undef, ptr undef), !callees [[META6:![0-9]+]]
+; LIMI0-NEXT:    ret void
 ;
 cond.end.i:
   call void undef(ptr undef, i32 undef, ptr undef), !callees !3
@@ -688,21 +699,25 @@ define void @as_cast(ptr %arg) {
 ;.
 ; OUNLM: [[META0:![0-9]+]] = !{[[META1:![0-9]+]]}
 ; OUNLM: [[META1]] = !{i64 0, i1 false}
+; OUNLM: [[META2]] = distinct !{ptr undef, ptr null}
 ;.
 ; LIMI2: [[META0]] = !{ptr @void, ptr @retFloatTakeFloat}
 ; LIMI2: [[META1]] = !{ptr @void}
 ; LIMI2: [[META2:![0-9]+]] = !{[[META3:![0-9]+]]}
 ; LIMI2: [[META3]] = !{i64 0, i1 false}
+; LIMI2: [[META4]] = distinct !{ptr undef, ptr null}
 ;.
 ; LIMI0: [[META0]] = !{ptr @func4, ptr @internal_good}
 ; LIMI0: [[META1]] = !{ptr @func3, ptr @func4}
 ; LIMI0: [[META2]] = !{ptr @takeI32, ptr @retI32, ptr @void, ptr @retFloatTakeFloat}
 ; LIMI0: [[META3]] = !{ptr @takeI32, ptr @retI32, ptr @void}
 ; LIMI0: [[META4:![0-9]+]] = !{[[META5:![0-9]+]]}
 ; LIMI0: [[META5]] = !{i64 0, i1 false}
+; LIMI0: [[META6]] = distinct !{ptr undef, ptr null}
 ;.
 ; CWRLD: [[META0:![0-9]+]] = !{[[META1:![0-9]+]]}
 ; CWRLD: [[META1]] = !{i64 0, i1 false}
+; CWRLD: [[META2]] = distinct !{ptr undef, ptr null}
 ;.
 ;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
 ; DOT: {{.*}}

llvm/test/Transforms/Attributor/value-simplify.ll

@@ -626,7 +626,7 @@ define internal ptr @test_byval2(ptr byval(%struct.X) %a) {
 ; CHECK-NEXT:    [[A_PRIV:%.*]] = alloca [[STRUCT_X:%.*]], align 8
 ; CHECK-NEXT:    store ptr [[TMP0]], ptr [[A_PRIV]], align 8
 ; CHECK-NEXT:    call void @sync()
-; CHECK-NEXT:    [[L:%.*]] = load ptr, ptr [[A_PRIV]], align 8
+; CHECK-NEXT:    [[L:%.*]] = load ptr, ptr [[A_PRIV]], align 8, !invariant.load [[META0:![0-9]+]]
 ; CHECK-NEXT:    ret ptr [[L]]
 ;
   call void @sync()
@@ -975,11 +975,11 @@ define i1 @icmp() {
 define void @test_callee_is_undef(ptr %fn) {
 ; TUNIT-LABEL: define {{[^@]+}}@test_callee_is_undef
 ; TUNIT-SAME: (ptr nofree captures(none) [[FN:%.*]]) {
-; TUNIT-NEXT:    unreachable
+; TUNIT-NEXT:    call void @unknown_calle_arg_is_undef(ptr nofree noundef captures(none) [[FN]])
+; TUNIT-NEXT:    ret void
 ;
 ; CGSCC-LABEL: define {{[^@]+}}@test_callee_is_undef
-; CGSCC-SAME: (ptr nofree captures(none) [[FN:%.*]]) {
-; CGSCC-NEXT:    call void @callee_is_undef()
+; CGSCC-SAME: (ptr nofree noundef nonnull captures(none) [[FN:%.*]]) {
 ; CGSCC-NEXT:    call void @unknown_calle_arg_is_undef(ptr nofree noundef nonnull captures(none) [[FN]])
 ; CGSCC-NEXT:    ret void
 ;
@@ -989,20 +989,20 @@ define void @test_callee_is_undef(ptr %fn) {
 }
 define internal void @callee_is_undef(ptr %fn) {
 ;
-; CGSCC: Function Attrs: memory(readwrite, argmem: none)
+; CGSCC: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
 ; CGSCC-LABEL: define {{[^@]+}}@callee_is_undef
-; CGSCC-SAME: () #[[ATTR2]] {
+; CGSCC-SAME: () #[[ATTR1]] {
 ; CGSCC-NEXT:    unreachable
 ;
   call void %fn()
   ret void
 }
 define internal void @unknown_calle_arg_is_undef(ptr %fn, i32 %arg) {
 ;
-; CGSCC-LABEL: define {{[^@]+}}@unknown_calle_arg_is_undef
-; CGSCC-SAME: (ptr nofree noundef nonnull captures(none) [[FN:%.*]]) {
-; CGSCC-NEXT:    call void [[FN]](i32 undef)
-; CGSCC-NEXT:    ret void
+; CHECK-LABEL: define {{[^@]+}}@unknown_calle_arg_is_undef
+; CHECK-SAME: (ptr nofree noundef nonnull captures(none) [[FN:%.*]]) {
+; CHECK-NEXT:    call void [[FN]](i32 undef)
+; CHECK-NEXT:    ret void
 ;
   call void %fn(i32 %arg)
   ret void
@@ -1359,7 +1359,7 @@ define internal i32 @ret_speculatable_expr(ptr %mem, i32 %a2) {
 ; CGSCC-SAME: (i32 [[TMP0:%.*]]) #[[ATTR1]] {
 ; CGSCC-NEXT:    [[MEM_PRIV:%.*]] = alloca i32, align 4
 ; CGSCC-NEXT:    store i32 [[TMP0]], ptr [[MEM_PRIV]], align 4
-; CGSCC-NEXT:    [[L:%.*]] = load i32, ptr [[MEM_PRIV]], align 4
+; CGSCC-NEXT:    [[L:%.*]] = load i32, ptr [[MEM_PRIV]], align 4, !invariant.load [[META0]]
 ; CGSCC-NEXT:    [[MUL:%.*]] = mul i32 [[L]], 13
 ; CGSCC-NEXT:    [[ADD:%.*]] = add i32 [[MUL]], 7
 ; CGSCC-NEXT:    ret i32 [[ADD]]
@@ -1709,3 +1709,7 @@ define i32 @readExtInitZeroInit() {
 ; CGSCC: attributes #[[ATTR17]] = { nosync }
 ; CGSCC: attributes #[[ATTR18]] = { nounwind }
 ;.
+; TUNIT: [[META0]] = !{}
+;.
+; CGSCC: [[META0]] = !{}
+;.