address PR comments, remove status and CheckAccessFullyMapped, remove unsupported targets

Author: kmpeng

test/Feature/ByteAddressBuffer/ByteAddressBuffers-16bit.test

@@ -5,35 +5,27 @@
 
 // The expected behaviour is to load the values in `In0` and `In1` at the given
 // byte-offset, add them, and store the result at the respective offset in
-// `Out`. We expect each load and store to only access mapped resource data, so
-// `CheckAccessFullyMapped` should always return `true = 1`.
+// `Out`.
 
 ByteAddressBuffer In0 : register(t0);
 ByteAddressBuffer In1 : register(t1);
-RWByteAddressBuffer Out : register(u0);
-RWBuffer<uint> Mapped : register(u0, space1);
+RWByteAddressBuffer Out : register(u2);
 
 [numthreads(4,1,1)]
 void main() {
-  uint status;
-
-  int16_t U0 = In0.Load<int16_t>(0, status);
-  Mapped[0] = CheckAccessFullyMapped(status);
+  int16_t U0 = In0.Load<int16_t>(0);
   int16_t V0 = In1.Load<int16_t>(0);
   Out.Store<int16_t>(0, U0 + V0);
 
-  int16_t2 U1 = In0.Load<int16_t2>(8, status);
-  Mapped[1] = CheckAccessFullyMapped(status);
+  int16_t2 U1 = In0.Load<int16_t2>(8);
   int16_t2 V1 = In1.Load<int16_t2>(8);
   Out.Store<int16_t2>(8, U1 + V1);
 
-  int16_t3 U2 = In0.Load<int16_t3>(16, status);
-  Mapped[2] = CheckAccessFullyMapped(status);
+  int16_t3 U2 = In0.Load<int16_t3>(16);
   int16_t3 V2 = In1.Load<int16_t3>(16);
   Out.Store<int16_t3>(16, U2 + V2);
 
-  int16_t4 U3 = In0.Load<int16_t4>(24, status);
-  Mapped[3] = CheckAccessFullyMapped(status);
+  int16_t4 U3 = In0.Load<int16_t4>(24);
   int16_t4 V3 = In1.Load<int16_t4>(24);
   Out.Store<int16_t4>(24, U3 + V3);
 }
@@ -65,50 +57,37 @@ Buffers:
     Stride: 2
     Data: [ 0x101, 0x000, 0x000, 0x000, 0x505, 0x606, 0x000, 0x000,
             0x909, 0xA0A, 0xB0B, 0x000, 0xD0D, 0xE0E, 0xF0F, 0x1010 ]
-  - Name: Mapped
-    Format: Int32
-    Stride: 4
-    FillSize: 16
-  - Name: ExpectedMapped
-    Format: Int32
-    Stride: 4
-    Data: [ 1, 1, 1, 1 ]
 Results:
   - Result: Test0
     Rule: BufferExact
     Actual: Out
     Expected: ExpectedOut
-  - Result: Test1
-    Rule: BufferExact
-    Actual: Mapped
-    Expected: ExpectedMapped
 DescriptorSets:
   - Resources:
     - Name: In0
       Kind: ByteAddressBuffer
       DirectXBinding:
         Register: 0
         Space: 0
+      VulkanBinding:
+        Binding: 0
     - Name: In1
       Kind: ByteAddressBuffer
       DirectXBinding:
         Register: 1
         Space: 0
+      VulkanBinding:
+        Binding: 1
     - Name: Out
       Kind: RWByteAddressBuffer
       DirectXBinding:
-        Register: 0
+        Register: 2
         Space: 0
-    - Name: Mapped
-      Kind: RWBuffer
-      DirectXBinding:
-        Register: 0
-        Space: 1
+      VulkanBinding:
+        Binding: 2
 ...
 #--- end
 
-# UNSUPPORTED: Vulkan, Metal
-
 # Unimplemented https://github.com/llvm/llvm-project/issues/108058
 # XFAIL: Clang
 

test/Feature/ByteAddressBuffer/ByteAddressBuffers-64bit.test

@@ -5,35 +5,27 @@
 
 // The expected behaviour is to load the values in `In0` and `In1` at the given
 // byte-offset, add them, and store the result at the respective offset in
-// `Out`. We expect each load and store to only access mapped resource data, so
-// `CheckAccessFullyMapped` should always return `true = 1`.
+// `Out`.
 
 ByteAddressBuffer In0 : register(t0);
 ByteAddressBuffer In1 : register(t1);
-RWByteAddressBuffer Out : register(u0);
-RWBuffer<uint> Mapped : register(u0, space1);
+RWByteAddressBuffer Out : register(u2);
 
 [numthreads(4,1,1)]
 void main() {
-  uint status;
-
-  int64_t U0 = In0.Load<int64_t>(0, status);
-  Mapped[0] = CheckAccessFullyMapped(status);
+  int64_t U0 = In0.Load<int64_t>(0);
   int64_t V0 = In1.Load<int64_t>(0);
   Out.Store<int64_t>(0, U0 + V0);
 
-  int64_t2 U1 = In0.Load<int64_t2>(32, status);
-  Mapped[1] = CheckAccessFullyMapped(status);
+  int64_t2 U1 = In0.Load<int64_t2>(32);
   int64_t2 V1 = In1.Load<int64_t2>(32);
   Out.Store<int64_t2>(32, U1 + V1);
 
-  int64_t3 U2 = In0.Load<int64_t3>(64, status);
-  Mapped[2] = CheckAccessFullyMapped(status);
+  int64_t3 U2 = In0.Load<int64_t3>(64);
   int64_t3 V2 = In1.Load<int64_t3>(64);
   Out.Store<int64_t3>(64, U2 + V2);
 
-  int64_t4 U3 = In0.Load<int64_t4>(96, status);
-  Mapped[3] = CheckAccessFullyMapped(status);
+  int64_t4 U3 = In0.Load<int64_t4>(96);
   int64_t4 V3 = In1.Load<int64_t4>(96);
   Out.Store<int64_t4>(96, U3 + V3);
 }
@@ -65,50 +57,37 @@ Buffers:
     Stride: 8
     Data: [ 0x101, 0x000, 0x000, 0x000, 0x505, 0x606, 0x000, 0x000,
             0x909, 0xA0A, 0xB0B, 0x000, 0xD0D, 0xE0E, 0xF0F, 0x1010 ]
-  - Name: Mapped
-    Format: Int32
-    Stride: 4
-    FillSize: 16
-  - Name: ExpectedMapped
-    Format: Int32
-    Stride: 4
-    Data: [ 1, 1, 1, 1 ]
 Results:
   - Result: Test0
     Rule: BufferExact
     Actual: Out
     Expected: ExpectedOut
-  - Result: Test1
-    Rule: BufferExact
-    Actual: Mapped
-    Expected: ExpectedMapped
 DescriptorSets:
   - Resources:
     - Name: In0
       Kind: ByteAddressBuffer
       DirectXBinding:
         Register: 0
         Space: 0
+      VulkanBinding:
+        Binding: 0
     - Name: In1
       Kind: ByteAddressBuffer
       DirectXBinding:
         Register: 1
         Space: 0
+      VulkanBinding:
+        Binding: 1
     - Name: Out
       Kind: RWByteAddressBuffer
       DirectXBinding:
-        Register: 0
+        Register: 2
         Space: 0
-    - Name: Mapped
-      Kind: RWBuffer
-      DirectXBinding:
-        Register: 0
-        Space: 1
+      VulkanBinding:
+        Binding: 2
 ...
 #--- end
 
-# UNSUPPORTED: Vulkan, Metal
-
 # Unimplemented https://github.com/llvm/llvm-project/issues/108058
 # XFAIL: Clang
 

test/Feature/ByteAddressBuffer/ByteAddressBuffers.test

@@ -5,8 +5,7 @@
 
 // The expected behaviour is to load the values in `In0` and `In1` at the given
 // byte-offset, add them, and store the result at the respective offset in
-// `Out`. We expect each load and store to only access mapped resource data, so
-// `CheckAccessFullyMapped` should always return `true = 1`.
+// `Out`.
 
 struct S0 {
   int a;
@@ -22,74 +21,60 @@ struct S1 {
 
 ByteAddressBuffer In0 : register(t0);
 ByteAddressBuffer In1 : register(t1);
-RWByteAddressBuffer Out : register(u0);
-RWBuffer<uint> Mapped : register(u0, space1);
+RWByteAddressBuffer Out : register(u2);
 
 [numthreads(4,1,1)]
 void main() {
-  uint status;
-
   // uint
-  uint U0 = In0.Load(0, status);
-  Mapped[0] = CheckAccessFullyMapped(status);
+  uint U0 = In0.Load(0);
   uint V0 = In1.Load(0);
   Out.Store(0, U0 + V0);
 
-  uint2 U1 = In0.Load2(16, status);
-  Mapped[1] = CheckAccessFullyMapped(status);
+  uint2 U1 = In0.Load2(16);
   uint2 V1 = In1.Load2(16);
   Out.Store2(16, U1 + V1);
 
-  uint3 U2 = In0.Load3(32, status);
-  Mapped[2] = CheckAccessFullyMapped(status);
+  uint3 U2 = In0.Load3(32);
   uint3 V2 = In1.Load3(32);
   Out.Store3(32, U2 + V2);
 
-  uint4 U3 = In0.Load4(48, status);
-  Mapped[3] = CheckAccessFullyMapped(status);
+  uint4 U3 = In0.Load4(48);
   uint4 V3 = In1.Load4(48);
   Out.Store4(48, U3 + V3);
 
   // bool
-  bool U4 = In0.Load<bool>(64, status);
-  Mapped[4] = CheckAccessFullyMapped(status);
+  bool U4 = In0.Load<bool>(64);
   bool V4 = In1.Load<bool>(64);
   Out.Store<bool>(64, U4 + V4);
 
-  bool2 U5 = In0.Load<bool2>(64, status);
-  Mapped[5] = CheckAccessFullyMapped(status);
+  bool2 U5 = In0.Load<bool2>(64);
   bool2 V5 = In1.Load<bool2>(64);
   Out.Store<bool2>(80, U5 + V5);
 
-  bool3 U6 = In0.Load<bool3>(64, status);
-  Mapped[6] = CheckAccessFullyMapped(status);
+  bool3 U6 = In0.Load<bool3>(64);
   bool3 V6 = In1.Load<bool3>(64);
   Out.Store<bool3>(96, U6 + V6);
 
-  bool4 U7 = In0.Load<bool4>(64, status);
-  Mapped[7] = CheckAccessFullyMapped(status);
+  bool4 U7 = In0.Load<bool4>(64);
   bool4 V7 = In1.Load<bool4>(64);
   Out.Store<bool4>(112, U7 + V7);
 
   // array
-  int U8[4] = In0.Load<int[4]>(0, status);
-  Mapped[8] = CheckAccessFullyMapped(status);
+  int U8[4] = In0.Load<int[4]>(0);
   int V8[4] = In1.Load<int[4]>(0);
   int TempArray[4];
-  for(int i = 0; i < 4; i++) {
-    TempArray[i] = U8[i] + V8[i];
+  for(int I = 0; I < 4; I++) {
+    TempArray[I] = U8[I] + V8[I];
   }
   Out.Store<int[4]>(128, TempArray);
 
   // structs
-  S0 U9 = In0.Load<S0>(0, status);
-  Mapped[9] = CheckAccessFullyMapped(status);
+  S0 U9 = In0.Load<S0>(0);
   S0 V9 = In1.Load<S0>(0);
   S0 TempStruct0 = {U9.a + V9.a, U9.b + V9.b};
   Out.Store<S0>(144, TempStruct0);
 
-  S1 U10 = In0.Load<S1>(0, status);
-  Mapped[10] = CheckAccessFullyMapped(status);
+  S1 U10 = In0.Load<S1>(0);
   S1 V10 = In1.Load<S1>(0);
   S1 TempStruct1 = {U10.a + V10.a, U10.b + V10.b, U10.c + V10.c, U10.d + V10.d};
   Out.Store<S1>(160, TempStruct1);
@@ -129,50 +114,37 @@ Buffers:
             0x101, 0x202, 0x303, 0x404, 0x101, 0x202, 0x000, 0x000,
             0x101, 0x202, 0x303, 0x404, 0x505, 0x606, 0x707, 0x808,
             0x909, 0xA0A, 0xB0B, 0xC0C, 0xD0D, 0xE0E, 0xF0F, 0x1010 ]
-  - Name: Mapped
-    Format: Int32
-    Stride: 4
-    FillSize: 44
-  - Name: ExpectedMapped
-    Format: Int32
-    Stride: 4
-    Data: [ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 ]
 Results:
   - Result: Test0
     Rule: BufferExact
     Actual: Out
     Expected: ExpectedOut
-  - Result: Test1
-    Rule: BufferExact
-    Actual: Mapped
-    Expected: ExpectedMapped
 DescriptorSets:
   - Resources:
     - Name: In0
       Kind: ByteAddressBuffer
       DirectXBinding:
         Register: 0
         Space: 0
+      VulkanBinding:
+        Binding: 0
     - Name: In1
       Kind: ByteAddressBuffer
       DirectXBinding:
         Register: 1
         Space: 0
+      VulkanBinding:
+        Binding: 1
     - Name: Out
       Kind: RWByteAddressBuffer
       DirectXBinding:
-        Register: 0
+        Register: 2
         Space: 0
-    - Name: Mapped
-      Kind: RWBuffer
-      DirectXBinding:
-        Register: 0
-        Space: 1
+      VulkanBinding:
+        Binding: 2
 ...
 #--- end
 
-# UNSUPPORTED: Vulkan, Metal
-
 # Unimplemented https://github.com/llvm/llvm-project/issues/108058
 # XFAIL: Clang