Skip to content

Conversation

@devansh-lodha
Copy link

Description

This Draft Pull Request introduces initial, work-in-progress support for the Raspberry Pi 5 to the tutorial series. The goal is to eventually provide full compatibility for the Pi 5, allowing a new generation of hardware to be used for these excellent tutorials.

This initial submission ports the codebase from Tutorial 9 to Tutorial 12, establishing the foundational Board Support Package (BSP) and the necessary development infrastructure.

Current Status & Key Changes:

  1. Working Kernel up to Tutorial 11: The kernel successfully boots and runs on Raspberry Pi 5 hardware. Key features are confirmed working:

    • Privilege level transition from EL2 to EL1.
    • Full MMU setup with an identity map.
    • Working UART console via the new RP1 I/O controller.
    • Basic exception handling for synchronous exceptions (demonstrated with page faults).
  2. New Raspberry Pi 5 BSP:

    • A new bsp_rpi5 feature and corresponding bsp/raspberrypi5 module have been created.
    • Includes a new GPIO driver (bsp/device_driver/rp1_gpio.rs) that correctly handles the Pi 5's two-step PADS and IO_BANK configuration.
    • Memory maps have been updated to reflect the RP1 peripheral addresses behind the PCIe bus.
  3. JTAG Debugging Workflow:

    • The port is based on a professional JTAG/GDB debugging workflow, which is more powerful for low-level development than the tutorial's original chainloader (minipush).
    • To support this, I have added two top-level directories that follow the repository's existing structure:
      • X2_pi5_jtag_halt_stub: A self-contained project to build the halt_stub.img needed on the SD card for JTAG debugging. This is analogous to the X1_JTAG_boot project.
      • debug/pi5: Contains the openocd and gdb configuration files specific to the Raspberry Pi 5 and the official Debug Probe.
    • The Makefile for the Pi 5 target is adapted to use this new infrastructure.
    • So essentially, the SD Card will only have the halt_stub.img renamed to kernel8.img along with all the firmware files. Currently putting only enable_jtag_gpio=1 and pciex4_reset=0 in the config.txt works for me.
    • This allows for a quick workflow where you only need to power cycle the Pi5 and load the new image without having to flash the SD card.
  4. Handling of Tutorial 12 (Integrated Testing):

    • Due to the current lack of a QEMU machine type for the Raspberry Pi 5, the automated tests cannot be run in emulation.
    • However, the full structural refactoring of Tutorial 12 (workspace, lib.rs, custom test frameworks) has been implemented.
    • For the BSP=rpi5 target, the Makefile has been configured to use cargo test --no-run. This compiles all tests to ensure they are valid and the infrastructure is correct, but skips the execution step. But these can be executed manually by loading onto the hardware via gdb.
    • This approach ensures structural alignment with the main repository while acknowledging the current tooling limitations. Verification for the Pi 5 is performed manually on hardware via GDB.

Purpose of this Draft PR:

This PR is opened early to seek feedback and start a discussion with the maintainers. The code is functional, but I know that documentation and other aspects are not yet complete. My main goal is to ensure my approach aligns with the project's standards before I proceed further.

I am particularly looking for feedback on:

  1. Overall Structure: Is the new bsp/raspberrypi5 structure and the top-level debug/ and X2_... directories an acceptable way to integrate Pi 5 support?
  2. Testing Strategy: Is the "compile but don't run" approach for Pi 5 tests a reasonable solution given the QEMU limitations?
  3. Documentation: What is the preferred way to add Pi 5-specific notes to the tutorial READMEs? Should I add conditional sections, or separate documents?
  4. Future Work (Interrupts): I am now porting Tutorial 13. This will introduce significant new drivers for the BCM2712's GICv2 and the RP1's PCIe MSI-X interrupt chain (MIP). Given the complexity, would you prefer I continue on this single PR, or would a dedicated pi5-port feature branch within the main repository be more appropriate for ongoing collaboration?

Thank you for your time and for this fantastic learning resource. I look forward to your guidance.

Best regards,
Devansh Lodha (devanshlodha12@gmail.com)

Pre-commit steps

  • Tested on real HW (Raspberry Pi 5). QEMU testing is not applicable for the Pi 5 target.
  • Ran ./contributor_setup.sh followed by ./devtool ready_for_publish
    • Note: I will run the full devtool suite to clean up formatting and licensing once the core structural feedback is received, to avoid unnecessary churn in early commits.

Adds the necessary infrastructure for a JTAG-based debugging workflow on the Raspberry Pi 5.

This includes a new 'debug/pi5' directory with OpenOCD and GDB configuration files, and a new 'X2_pi5_jtag_halt_stub' project that compiles a simple assembly stub to halt the CPU for debugging.

This lays the foundation for the Pi 5 BSP and debugging targets in the tutorial Makefiles.

Co-authored-by: Devansh Lodha <devanshlodha12@gmail.com>
Introduces the Board Support Package for Tutorial 09 for the Raspberry Pi 5.

- Adds the 'bsp_rpi5' cargo feature
- creates the 'src/bsp/raspberrypi5' directory, including boilerplate files for cpu, driver, kernel.ld, and memory map.
- The memory map defines the base address for the RP1 I/O controller.
Adds the GPIO driver for the Raspberry Pi 5's RP1 I/O controller.

The RP1 requires a two-step GPIO setup for peripherals. This driver handles the logic for both the PADS_BANK0 and IO_BANK0 register blocks.

The build system is modified to conditionally compile this driver when the 'bsp_rpi5' feature is enabled.
Updates the Makefile in '09_privilege_level' to support the new Raspberry Pi 5 target and its JTAG-based workflow.

- Adds a 'bsp_rpi5' configuration block, setting the CPU to cortex-a76.
- Adds a new 'sd_image' target that builds the halt stub.
- Implements OS-aware logic to use local 'openocd' and 'gdb' on macOS while retaining the Docker-based commands for Linux.
Makes two improvements to the shared bcm2xxx_pl011_uart driver:

1. Conditionally sets the baud rate to 115200 when compiling for 'bsp_rpi5'.

2. Fixes terminal display by implementing '\n' to '\r\n' translation in the 'write_char' function, ensuring correct cursor positioning for all output.
This commit ports the foundational Raspberry Pi 5 support from Tutorial 09 to Tutorial 10.

It includes:
- The 'bsp_rpi5' feature in Cargo.toml.
- The Pi 5 BSP directory structure with initial cpu and driver files.
- The RP1 GPIO driver and the necessary conditional compilation logic in the driver modules.
- Makefile adaptations for the Pi 5 JTAG debugging workflow.
- The Pi 5-specific baud rate fix for the shared PL011 UART driver.
Enables virtual memory for the Raspberry Pi 5 target by implementing the required BSP-specific memory layout.

This resolves a silent hang on boot that occurs immediately after the MMU is enabled. The root cause was a Translation Fault when the kernel tried to access peripheral drivers in high memory (0x1f...). The initial 4 GiB virtual address space was too small, so no page table entries were being generated for the RP1's MMIO region.

This fix includes:
1.  In 'memory.rs', the virtual address space is expanded to 128 GiB, the smallest power-of-two that encompasses the RP1's MMIO addresses.
2.  A new 'memory/mmu.rs' file is added to define the 'KernelVirtualLayout'. This layout correctly identity-maps the RP1 peripheral range as Device memory and ports the tutorial's educational UART remapping feature.
3.  The 'kernel.ld' linker script is updated to align the code section to a 64 KiB page boundary and export the symbols required by the MMU layout code.
This commit ports the foundational Raspberry Pi 5 support from Tutorial 10 to Tutorial 11.

It includes:
- The 'bsp_rpi5' feature in Cargo.toml and a version bump to 0.11.0.
- The Pi 5 BSP directory structure with all necessary files.
- The RP1 GPIO driver and conditional compilation logic.
- Makefile adaptations for the Pi 5 JTAG debugging workflow.
- The newline translation fix in the shared PL011 UART driver.
Adjusts the tutorial's exception-triggering demonstration to ensure it produces the intended translation fault on the Raspberry Pi 5.

The Pi 5 port uses a 128 GiB virtual address space to accommodate the RP1 peripheral map. The original tutorial's faulting address of 8 GiB falls within this space, which would lead to an identity mapping and a bus error instead of the desired translation fault.

This commit changes the faulting addresses to 129 GiB and 130 GiB, placing them outside the defined virtual address space. The exception handler is updated accordingly to catch the new 129 GiB address for the recoverable fault demonstration.
This commit ports the foundational Raspberry Pi 5 support from Tutorial 11 to the new workspace structure of Tutorial 12.

It includes:
- The 'bsp_rpi5' feature in kernel/Cargo.toml and a version bump to 0.12.0.
- The Pi 5 BSP directory structure ('kernel/src/bsp/raspberrypi5').
- The RP1 GPIO driver and updated conditional compilation logic in the shared driver modules to correctly export drivers for each target.
- The Pi 5-specific baud rate fix for the shared PL011 UART driver.
Adapts the custom test framework introduced in Tutorial 12 to the Raspberry Pi 5, which lacks QEMU support.

1.  Makefile: Implements a 'Compile, Don't Run' strategy for the 'test', 'test_unit', and 'test_integration' targets when BSP=rpi5. This allows the test binaries to be compiled for verification without attempting to run them in a non-existent emulator.

2.  On-Hardware Test Console: A 'qemu_bring_up_console' function is implemented for the Pi 5 BSP to perform the necessary on-hardware GPIO and UART initialization, enabling test binaries to produce UART output when run on the device.

3.  Integration Test: The '02_exception_sync_page_fault' test is updated to use a 129 GiB faulting address for the Pi 5, ensuring it correctly triggers a translation fault given the board's larger 128 GiB virtual address space.
@jonathanpallant
Copy link

I wanted to note that drivers for the arm-gic and other bits of Arm IP already exist at: https://github.com/ArmFirmwareCrates. You may still want your own copies in this tree in the end, but no sense in starting completely from scratch.

Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment

Labels

None yet

Projects

None yet

Development

Successfully merging this pull request may close these issues.

2 participants