Allow vscr to be marked as a clobber in PowerPC inline asm

[pmur]

I don't think gcc or llvm do anything with vscr, but they do allow it to be marked as a clobber. This prevents needing to enumerate it as a preserved flag if an update does make use of it.

ELFv2 defines this as a "limited-access" register. This means the VSCR[SAT] bit is clobbered by a function call.

r? @Amanieu

[rustbot]

Some changes occurred in compiler/rustc_codegen_gcc

cc @antoyo, @GuillaumeGomez

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[Amanieu]

I don't think this is the correct approach, and I think this should be handled via preserves_flags instead. The main reason for this is that the different bits in both fpscr and vscr have different behavior with regards to the ABI.

Some bits are treated as global state:

• FPSCR exception enable bits
• FPSCR rounding mode bits
• VSCR NJ bit

Some bits are treated as volatile state:

• FPSCR exception status bits
• VSCR SAT bit

At the very least we would need separate clobbers for the different types of flags, but I feel that here it's better to stay consistent with other architectures and put all of these under preserves_flags.