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@sarckk sarckk commented Nov 7, 2025

Purpose

#26969 added usage of AITER gemm_a16w16 for GEMM ops on AMD for valid shapes. However, it passes a bias term to gemm_a16w16 that was only added to AITER in ROCm/aiter#1148 (merged Oct 28).

Some are still using an older version of AITER. For backward compatibility, we should have an option to disable using this AITER triton gemm kernels.

Test Plan

VLLM_ROCM_USE_AITER_TRITON_GEMM=0 VLLM_ROCM_USE_AITER=1  vllm serve Qwen/Qwen3-8B

Test Result

Checked that VLLM_ROCM_USE_AITER_TRITON_GEMM=0 disables it and by default on.


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  • The purpose of the PR, such as "Fix some issue (link existing issues this PR will resolve)".
  • The test plan, such as providing test command.
  • The test results, such as pasting the results comparison before and after, or e2e results
  • (Optional) The necessary documentation update, such as updating supported_models.md and examples for a new model.
  • (Optional) Release notes update. If your change is user facing, please update the release notes draft in the Google Doc.

Signed-off-by: Yong Hoon Shin <yhshin@meta.com>
@sarckk sarckk force-pushed the aiter-triton-gemm branch from 20ac3b0 to c87094f Compare November 7, 2025 19:55
@mergify mergify bot added the rocm Related to AMD ROCm label Nov 7, 2025
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Code Review

This pull request introduces an environment variable VLLM_ROCM_USE_AITER_TRITON_GEMM to control the usage of AITER's Triton GEMM kernel, which is a good addition for backward compatibility. The implementation is straightforward. However, there is a critical issue: the new environment variable, which affects the computation graph, has not been added to the compute_hash function. This can lead to incorrect caching behavior. I've added a comment with details on how to fix this.

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sarckk commented Nov 7, 2025

cc: @gshtras @maleksan85

Signed-off-by: Yong Hoon Shin <yhshin@meta.com>
Signed-off-by: Yong Hoon Shin <yhshin@meta.com>
@sarckk sarckk requested review from gshtras and houseroad November 8, 2025 22:52
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