[bsp][renesas] Add ra8p1-titan-board BSP

.github/ALL_BSP_COMPILE.json

@@ -264,6 +264,7 @@
         "renesas/ra8m1-ek",
         "renesas/ra8d1-ek",
         "renesas/ra8d1-vision-board",
+        "renesas/ra8p1-titan-board",
         "renesas/rzt2m_rsk",
         "renesas/rzn2l_rsk",
         "renesas/rzn2l_etherkit",

bsp/README.md

@@ -33,28 +33,29 @@ This document is based on the RT-Thread mainline repository and categorizes the
 
 #### 🟢 Renesas
 
-| BSP Name | GPIO | UART | ADC | CAN | CANFD | DAC | Ethernet | HWTimer | I2C | PWM | RTC | SPI | Soft SPI | Flash | SDHI | SCI | SDRAM | LCD | Other |
-|----------|------|------|-----|-----|-------|-----|----------|---------|-----|-----|-----|-----|----------|-------|------|-----|-------|-----|-------|
-| [ebf_qi_min_6m5](renesas/ebf_qi_min_6m5) | ✅ | ✅ | ✅ | - | - | ✅ | - | - | ✅ | ✅ | - | ✅ | - | - | - | ✅ | - | - | - |
-| [ra2a1-ek](renesas/ra2a1-ek) | ✅ | ✅ | ✅ | - | - | ✅ | - | - | ✅ | ✅ | - | ✅ | - | - | - | ✅ | - | - | - |
-| [ra2e2-ek](renesas/ra2e2-ek) | ✅ | ✅ | ✅ | - | - | - | - | - | ✅ | ✅ | - | ✅ | - | - | - | - | - | - | - |
-| [ra2l1-cpk](renesas/ra2l1-cpk) | ✅ | ✅ | ✅ | ✅ | - | ✅ | - | - | ✅ | ✅ | - | ✅ | - | - | - | ✅ | - | - | ✅ |
-| [ra4e2-eco](renesas/ra4e2-eco) | ✅ | ✅ | - | - | - | - | - | - | ✅ | - | - | ✅ | - | - | - | - | - | - | - |
-| [ra4e2-ek](renesas/ra4e2-ek) | - | ✅ | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
-| [ra4m1-ek](renesas/ra4m1-ek) | ✅ | ✅ | ✅ | ✅ | - | ✅ | - | ✅ | ✅ | ✅ | - | ✅ | - | - | - | - | - | - | - |
-| [ra4m2-eco](renesas/ra4m2-eco) | ✅ | ✅ | - | - | - | - | - | - | - | - | - | ✅ | - | - | - | ✅ | - | - | - |
-| [ra6e2-ek](renesas/ra6e2-ek) | ✅ | ✅ | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
-| [ra6e2-fpb](renesas/ra6e2-fpb) | ✅ | ✅ | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
-| [ra6m3-ek](renesas/ra6m3-ek) | ✅ | ✅ | - | - | - | - | ✅ | ✅ | ✅ | ✅ | - | ✅ | - | - | - | ✅ | - | ✅ | - |
-| [ra6m3-hmi-board](renesas/ra6m3-hmi-board) | ✅ | ✅ | ✅ | ✅ | - | ✅ | ✅ | - | ✅ | ✅ | - | ✅ | - | - | ✅ | ✅ | - | ✅ | ✅ |
-| [ra6m4-cpk](renesas/ra6m4-cpk) | ✅ | ✅ | ✅ | ✅ | - | ✅ | - | - | ✅ | ✅ | - | ✅ | - | - | ✅ | ✅ | - | - | ✅ |
-| [ra6m4-iot](renesas/ra6m4-iot) | ✅ | ✅ | ✅ | ✅ | - | ✅ | - | - | ✅ | ✅ | - | ✅ | - | - | ✅ | ✅ | - | - | - |
-| [ra8d1-ek](renesas/ra8d1-ek) | ✅ | ✅ | ✅ | ✅ | - | ✅ | ✅ | - | ✅ | ✅ | - | ✅ | - | - | ✅ | ✅ | ✅ | ✅ | ✅ |
-| [ra8d1-vision-board](renesas/ra8d1-vision-board) | ✅ | ✅ | ✅ | ✅ | - | ✅ | - | - | ✅ | ✅ | - | ✅ | - | - | ✅ | ✅ | ✅ | ✅ | ✅ |
-| [ra8m1-ek](renesas/ra8m1-ek) | ✅ | ✅ | ✅ | - | - | ✅ | - | - | ✅ | ✅ | - | ✅ | - | - | - | ✅ | - | - | ✅ |
-| [rzn2l_etherkit](renesas/rzn2l_etherkit) | ✅ | ✅ | ✅ | - | ✅ | - | ✅ | ✅ | ✅ | ✅ | - | ✅ | - | - | - | ✅ | - | - | ✅ |
-| [rzn2l_rsk](renesas/rzn2l_rsk) | ✅ | ✅ | ✅ | - | ✅ | - | ✅ | ✅ | ✅ | - | - | ✅ | - | - | - | ✅ | - | - | ✅ |
-| [rzt2m_rsk](renesas/rzt2m_rsk) | ✅ | ✅ | ✅ | - | - | - | - | ✅ | ✅ | - | - | ✅ | - | - | - | ✅ | - | - | ✅ |
+| BSP Name | GPIO | UART | ADC | CAN | CANFD | DAC | Ethernet | HWTimer | I2C | PWM | RTC | SPI | Soft SPI | Flash | SDHI | SCI | SDRAM | LCD | **RS485** | Other |
+|----------|------|------|-----|-----|-------|-----|----------|---------|-----|-----|-----|-----|----------|-------|------|-----|-------|-----|-------|-------|
+| [ebf_qi_min_6m5](renesas/ebf_qi_min_6m5) | ✅ | ✅ | ✅ | - | - | ✅ | - | - | ✅ | ✅ | - | ✅ | - | - | - | ✅ | - | - | - | - |
+| [ra2a1-ek](renesas/ra2a1-ek) | ✅ | ✅ | ✅ | - | - | ✅ | - | - | ✅ | ✅ | - | ✅ | - | - | - | ✅ | - | - | - | - |
+| [ra2e2-ek](renesas/ra2e2-ek) | ✅ | ✅ | ✅ | - | - | - | - | - | ✅ | ✅ | - | ✅ | - | - | - | - | - | - | - | - |
+| [ra2l1-cpk](renesas/ra2l1-cpk) | ✅ | ✅ | ✅ | ✅ | - | ✅ | - | - | ✅ | ✅ | - | ✅ | - | - | - | ✅ | - | - | - | ✅ |
+| [ra4e2-eco](renesas/ra4e2-eco) | ✅ | ✅ | - | - | - | - | - | - | ✅ | - | - | ✅ | - | - | - | - | - | - | - | - |
+| [ra4e2-ek](renesas/ra4e2-ek) | - | ✅ | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
+| [ra4m1-ek](renesas/ra4m1-ek) | ✅ | ✅ | ✅ | ✅ | - | ✅ | - | ✅ | ✅ | ✅ | - | ✅ | - | - | - | - | - | - | - | - |
+| [ra4m2-eco](renesas/ra4m2-eco) | ✅ | ✅ | - | - | - | - | - | - | - | - | - | ✅ | - | - | - | ✅ | - | - | - | - |
+| [ra6e2-ek](renesas/ra6e2-ek) | ✅ | ✅ | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
+| [ra6e2-fpb](renesas/ra6e2-fpb) | ✅ | ✅ | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
+| [ra6m3-ek](renesas/ra6m3-ek) | ✅ | ✅ | - | - | - | - | ✅ | ✅ | ✅ | ✅ | - | ✅ | - | - | - | ✅ | - | ✅ | - | - |
+| [ra6m3-hmi-board](renesas/ra6m3-hmi-board) | ✅ | ✅ | ✅ | ✅ | - | ✅ | ✅ | - | ✅ | ✅ | - | ✅ | - | - | ✅ | ✅ | - | ✅ | - | ✅ |
+| [ra6m4-cpk](renesas/ra6m4-cpk) | ✅ | ✅ | ✅ | ✅ | - | ✅ | - | - | ✅ | ✅ | - | ✅ | - | - | ✅ | ✅ | - | - | - | ✅ |
+| [ra6m4-iot](renesas/ra6m4-iot) | ✅ | ✅ | ✅ | ✅ | - | ✅ | - | - | ✅ | ✅ | - | ✅ | - | - | ✅ | ✅ | - | - | - | - |
+| [ra8d1-ek](renesas/ra8d1-ek) | ✅ | ✅ | ✅ | ✅ | - | ✅ | ✅ | - | ✅ | ✅ | - | ✅ | - | - | ✅ | ✅ | ✅ | ✅ | - | ✅ |
+| [ra8d1-vision-board](renesas/ra8d1-vision-board) | ✅ | ✅ | ✅ | ✅ | - | ✅ | - | - | ✅ | ✅ | - | ✅ | - | - | ✅ | ✅ | ✅ | ✅ | - | ✅ |
+| [ra8p1-titan-board](renesas/ra8p1-titan-board) | ✅ | ✅ | ✅ | ✅ | ✅ | ✅ | ✅ | ✅ | ✅ | ✅ | ✅ | ✅ | - | ✅ | ✅ | ✅ | - | ✅ | ✅ | ✅ |
+| [ra8m1-ek](renesas/ra8m1-ek) | ✅ | ✅ | ✅ | - | - | ✅ | - | - | ✅ | ✅ | - | ✅ | - | - | - | ✅ | - | - | - | ✅ |
+| [rzn2l_etherkit](renesas/rzn2l_etherkit) | ✅ | ✅ | ✅ | - | ✅ | - | ✅ | ✅ | ✅ | ✅ | - | ✅ | - | - | - | ✅ | - | - | - | ✅ |
+| [rzn2l_rsk](renesas/rzn2l_rsk) | ✅ | ✅ | ✅ | - | ✅ | - | ✅ | ✅ | ✅ | - | - | ✅ | - | - | - | ✅ | - | - | - | ✅ |
+| [rzt2m_rsk](renesas/rzt2m_rsk) | ✅ | ✅ | ✅ | - | - | - | - | ✅ | ✅ | - | - | ✅ | - | - | - | ✅ | - | - | - | ✅ |
 
 #### 🟢 STM32
 

bsp/renesas/README.md

@@ -19,7 +19,8 @@ RA 系列 BSP 目前支持情况如下表所示：
 | [ra8m1-ek](ra8m1-ek)                     | Renesas 官方 EK-RA8M1 开发板                     |
 | [ra8d1-ek](ra8d1-ek)                     | Renesas 官方 EK-RA8D1 开发板                     |
 | [ra8d1-vision-board](ra8d1-vision-board) | Renesas 联合 RT-Thread RA8D1-Vision-Board 开发板 |
-| **RZ 系列**                             |                                                  |
+| [ra8p1-titan-board](ra8p1-titan-board)   | Renesas 联合 RT-Thread RA8P1-Titan-Board 开发板  |
+| **RZ 系列**                              |                                                  |
 | [rzt2m_rsk](rzt2m_rsk)                   | Renesas 官方 RSK-RZT2M 开发板                    |
 | [rzn2l_rsk](rzn2l_rsk)                   | Renesas 官方 RSK-RZN2L 开发板                    |
 

bsp/renesas/libraries/HAL_Drivers/drivers/SConscript

@@ -62,6 +62,9 @@ if GetDepend(['BSP_USING_SDHI']):
 if GetDepend(['BSP_USING_LCD']):
     src += ['drv_lcd.c']
 
+if GetDepend(['BSP_USING_RS485']):
+    src += ['drv_rs485.c']
+
 path =  [cwd]
 path += [cwd + '/config']
 

bsp/renesas/libraries/HAL_Drivers/drivers/config/drv_config.h

@@ -195,6 +195,32 @@ extern "C"
 
 #endif /* SOC_SERIES_R7FA8M85 */
 
+#ifdef SOC_SERIES_R7KA8P1
+
+#include "ra8/uart_config.h"
+
+#ifdef BSP_USING_PWM
+#include "ra8/pwm_config.h"
+#endif
+
+#ifdef BSP_USING_ADC
+#include "ra8/adc_config.h"
+#endif
+
+#ifdef BSP_USING_DAC
+#include "ra8/dac_config.h"
+#endif
+
+#ifdef BSP_USING_TIM
+#include "ra8/timer_config.h"
+#endif
+
+#ifdef BSP_USING_CANFD
+#include "ra8/canfd_config.h"
+#endif
+
+#endif /* SOC_SERIES_R7KA8P1 */
+
 #ifdef SOC_SERIES_R9A07G0
 #include "rzt/uart_config.h"
 #include "rzt/timer_config.h"

bsp/renesas/libraries/HAL_Drivers/drivers/config/ra8/adc_config.h

@@ -31,7 +31,11 @@ struct ra_adc_map
     const char *device_name;
     const adc_cfg_t *g_cfg;
     const adc_ctrl_t *g_ctrl;
-    const adc_channel_cfg_t   *g_channel_cfg;
+#ifdef SOC_SERIES_R7KA8P1
+	const adc_b_scan_cfg_t	*g_channel_cfg;
+#else
+    const adc_channel_cfg_t	*g_channel_cfg;
+#endif
 };
 #endif
 #endif

bsp/renesas/libraries/HAL_Drivers/drivers/config/ra8/canfd_config.h

@@ -0,0 +1,54 @@
+/*
+ * Copyright (c) 2006-2025, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author            Notes
+ * 2025-02-11     kurisaW           first version
+ */
+
+#ifndef __CAN_CONFIG_H__
+#define __CAN_CONFIG_H__
+
+#include <rtthread.h>
+#include "hal_data.h"
+
+#if defined(BSP_USING_CANFD)
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#if defined(BSP_USING_CAN0)
+#ifndef CAN0_CONFIG
+#define CAN0_CONFIG                   \
+    {                                 \
+        .name = "canfd0",             \
+        .num_of_mailboxs = 48,        \
+        .p_api_ctrl = &g_canfd0_ctrl, \
+        .p_cfg = &g_canfd0_cfg,       \
+    }
+#endif /* CAN0_CONFIG */
+#endif /* BSP_USING_CAN0 */
+
+#if defined(BSP_USING_CAN1)
+#ifndef CAN1_CONFIG
+#define CAN1_CONFIG                   \
+    {                                 \
+        .name = "canfd1",             \
+        .num_of_mailboxs = 48,        \
+        .p_api_ctrl = &g_canfd1_ctrl, \
+        .p_cfg = &g_canfd1_cfg,       \
+    }
+#endif /* CAN1_CONFIG */
+#endif /* BSP_USING_CAN1 */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* BSP_USING_CANFD */
+
+#endif /* __CAN_CONFIG_H__ */

bsp/renesas/libraries/HAL_Drivers/drivers/config/ra8/pwm_config.h

@@ -58,6 +58,9 @@ enum
 #endif
 #ifdef BSP_USING_PWM12
     BSP_PWM12_INDEX,
+#endif
+#ifdef BSP_USING_PWM13
+    BSP_PWM13_INDEX,
 #endif
     BSP_PWMS_NUM
 };

bsp/renesas/libraries/HAL_Drivers/drivers/config/ra8/timer_config.h

@@ -0,0 +1,70 @@
+/*
+ * Copyright (c) 2006-2023, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2023-09-04     Rbb666       first version
+ */
+
+#ifndef __TIMER_CONFIG_H__
+#define __TIMER_CONFIG_H__
+
+#include <rtthread.h>
+#include "hal_data.h"
+
+#ifdef SOC_SERIES_R7KA8P1
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#define PLCKD_PRESCALER_MAX_SELECT	9
+#define PLCKD_PRESCALER_250M    	(250000000U)
+#define PLCKD_PRESCALER_200M    	(200000000U)
+#define PLCKD_PRESCALER_100M    	(100000000U)
+#define PLCKD_PRESCALER_50M     	(50000000U)
+#define PLCKD_PRESCALER_25M     	(25000000U)
+#define PLCKD_PRESCALER_12_5M   	(12500000U)
+#define PLCKD_PRESCALER_6_25M   	(6250000U)
+#define PLCKD_PRESCALER_3_125M  	(3125000U)
+#define PLCKD_PRESCALER_1_5625M 	(1562500U)
+
+#ifndef TMR_DEV_INFO_CONFIG
+#define TMR_DEV_INFO_CONFIG                     \
+    {                                           \
+        .maxfreq = 250000000,                   \
+        .minfreq = 1562500,                     \
+        .maxcnt  = 0XFFFFFFFF,                  \
+        .cntmode = HWTIMER_CNTMODE_UP,          \
+    }
+#endif /* TIM_DEV_INFO_CONFIG */
+
+enum
+{
+#ifdef BSP_USING_TIM0
+    BSP_TIMER0_INDEX,
+#endif
+#ifdef BSP_USING_TIM1
+    BSP_TIMER1_INDEX,
+#endif
+    BSP_TIMERS_NUM
+};
+
+#define TIMER_DRV_INITIALIZER(num)      \
+    {                                   \
+        .name = "timer" #num,           \
+        .g_cfg = &g_timer##num##_cfg,   \
+        .g_ctrl = &g_timer##num##_ctrl, \
+        .g_timer = &g_timer##num,       \
+    }
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* SOC_SERIES_R7KA8P1 */
+
+#endif /* __TIMER_CONFIG_H__ */

bsp/renesas/libraries/HAL_Drivers/drivers/drv_adc.c

@@ -20,14 +20,29 @@
 #endif /* DRV_DEBUG */
 #include <rtdbg.h>
 
+#if defined(SOC_SERIES_R7KA8P1)
+
+#define R_ADC_Open      R_ADC_B_Open
+#define R_ADC_ScanCfg   R_ADC_B_ScanCfg
+#define R_ADC_ScanStart R_ADC_B_ScanStart
+#define R_ADC_Read32    R_ADC_B_Read32
+#define R_ADC_Read    	R_ADC_B_Read
+#define R_ADC_ScanStop  R_ADC_B_ScanStop
+
+#endif
+
 struct ra_adc_map ra_adc[] =
 {
 #ifdef BSP_USING_ADC0
     {
       .device_name = "adc0",
       .g_cfg = &g_adc0_cfg,
       .g_ctrl = &g_adc0_ctrl,
-      .g_channel_cfg = &g_adc0_channel_cfg,
+#ifdef SOC_SERIES_R7KA8P1
+      .g_channel_cfg = &g_adc0_scan_cfg,
+#else
+	  .g_channel_cfg = &g_adc0_channel_cfg,
+#endif
     },
 #endif
 #ifdef BSP_USING_ADC1

bsp/renesas/libraries/HAL_Drivers/drivers/drv_can.c

@@ -58,6 +58,45 @@ static const struct ra_baud_rate_tab can_baud_rate_tab[] =
 #define R_CAN_InfoGet               R_CANFD_InfoGet
 #define R_CAN_Write                 R_CANFD_Write
 
+#define can0_callback               canfd0_callback
+#define can1_callback               canfd1_callback
+
+const canfd_afl_entry_t p_canfd0_afl[CANFD_CFG_AFL_CH0_RULE_NUM] =
+{
+    {
+        .id =
+        {
+            .id         = 0x00,
+            .frame_type = CAN_FRAME_TYPE_DATA,
+            .id_mode    = CAN_ID_MODE_STANDARD
+        },
+        .destination =
+        {
+            .minimum_dlc       = CANFD_MINIMUM_DLC_0,
+            .rx_buffer         = CANFD_RX_MB_NONE,
+            .fifo_select_flags = CANFD_RX_FIFO_0
+        }
+    },
+};
+
+const canfd_afl_entry_t p_canfd1_afl[CANFD_CFG_AFL_CH1_RULE_NUM] =
+{
+    {
+        .id =
+        {
+            .id         = 0x01,
+            .frame_type = CAN_FRAME_TYPE_DATA,
+            .id_mode    = CAN_ID_MODE_STANDARD
+        },
+        .destination =
+        {
+            .minimum_dlc       = CANFD_MINIMUM_DLC_1,
+            .rx_buffer         = CANFD_RX_MB_NONE,
+            .fifo_select_flags = CANFD_RX_FIFO_1
+        }
+    },
+};
+
 #endif
 
 static rt_uint32_t get_can_baud_index(rt_uint32_t baud)
@@ -193,7 +232,7 @@ rt_ssize_t ra_can_sendmsg(struct rt_can_device *can_dev, const void *buf, rt_uin
     g_can_tx_frame.id_mode = msg_rt->ide;
     g_can_tx_frame.type = msg_rt->rtr;
     g_can_tx_frame.data_length_code = msg_rt->len;
-#if defined(BSP_USING_CANFD) && defined(BSP_USING_CAN_RZ)
+#if defined(BSP_USING_CANFD) && (defined(BSP_USING_CAN_RZ) || defined(BSP_USING_CAN_RA))
     g_can_tx_frame.options = 0;
 #elif defined(BSP_USING_CANFD)
     g_can_tx_frame.options = CANFD_FRAME_OPTION_FD | CANFD_FRAME_OPTION_BRS;

bsp/renesas/libraries/HAL_Drivers/drivers/drv_dac.c

@@ -21,6 +21,15 @@
 #endif /* DRV_DEBUG */
 #include <rtdbg.h>
 
+#if defined(SOC_SERIES_R7KA8P1)
+
+#define R_DAC_Open  R_DAC_B_Open
+#define R_DAC_Write R_DAC_B_Write
+#define R_DAC_Start R_DAC_B_Start
+#define R_DAC_Stop  R_DAC_B_Stop
+
+#endif
+
 struct ra_dac_map ra_dac[] =
 {
 #ifdef BSP_USING_DAC0